System and method for using pattern vectors for video and image coding and decoding
An exemplary embodiment of the invention relates to a method of using pattern vectors for image coding and decoding. The method comprises converting a block of image data into a set of transform coefficients, quantizing the transform coefficients such that a number of the coefficients become zero, constructing a single entity or bit vector indicating which coefficients are non-zero, coding the single entity or bit vector as an integer using an adaptive, semi-adaptive or non-adaptive arithmetic coder, coding the values of the coefficients in any fixed order, using an adaptive, semi-adaptive or non-adaptive arithmetic coder, or some other coder, and coding all coefficients except the zero coefficients. The system and method of decoding data relate to the corresponding hardware and process steps performed by the decoder when decoding a bitstream coded as described herein.
1. A method for coding image data, the method composing:
converting a block of image data into transform coefficients;
quantizing the transform coefficients such that all, some, or none of the transform coefficients become zero;
constructing a single entity indicating which transform coefficients are non-zero; and
coding the single entity as an integer using one of a semi-adaptive arithmetic coder or a non-adaptive arithmetic coder wherein the values of the transform coefficients are coded in any fixed order.
2. The method for coding image data of claim 1 , wherein each transform coefficient is coded according to its own context, based on the transform coefficient.
3. The method for coding image data of claim 1 , wherein the single entity is a bit vector.
4. A computer-readable medium having a stored computer program for controlling the operation of a computer device to perform data coding according to a method comprising the steps of:
converting a block of image data into transform coefficients;
quantizing the transform coefficients such that all, some, or none of the transform coefficients become zero;
constructing a single entity indicating which transform coefficients are non-zero; and
coding the single entity as an integer using one of a semi-adaptive arithmetic coder or a non-adaptive arithmetic coder wherein the values of the transform coefficients are coded in any fixed order.
5. The computer-readable medium of claim 4 , wherein the single entity is a bit vector.
6. A method of coding data not having a clearly defined relationship, the method comprising:
converting the data into transform coefficients;
quantizing the transform coefficients such that all, some or none of the transform coefficients become zero;
constructing a single entity from the quantized transform coefficients; and
coding the single entity using one of a semi-adaptive arithmetic coder or a non-adaptive arithmetic coder wherein the values of the transform coded in any fixed order.
7. The method of claim 6 , wherein the single entity is a bit vector.
8. A method of decoding a bitstream, the bitstream being coded using a single entity coded as an integer using one of a semi-adaptive arithmetic coder or a non-adaptive arithmetic coder, the method comprising:
decoding the single entity wherein the values of transform coefficients are decoded in any fixed order;
deconstructing the single entity to determine which coefficients are non-zero;
dequantizing the transform coefficients to determine whether all, some or none of the coefficients are zero; and
converting the dequantized transform coefficients into block image data.
9. The method of decoding a bitstream of claim 8 , wherein the single entity is a bit vector.
10. A computing device that codes an image, the computing device comprising:
a module configured to convert a block of image data into transform coefficients;
a module configured to quantize the transform coefficients such that all, some, or none of the transform coefficients become zero;
a module configured to construct a single entity indicating which transform coefficients are non-zero; and
a module configured to code the single entity as an integer using one of a semi-adaptive arithmetic coder or a non-adaptive arithmetic coder wherein the values of the transform coefficients are coded in any fixed order.
11. The computing device of claim 10 , wherein the single entity is a bit vector.