Technique for reducing the number of layers in a multilayer circuit board

1. A method for reducing the number of layers in a multilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal path layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board, the method comprising the steps of:

forming a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers;

arranging the surface such that a set of at least two power/ground pins is electrically connected to a via that extends only partially through the multilayer circuit board so as to create at least a portion of a channel on at least a first of the plurality of electrically conductive signal layers, the portion of the channel being located substantially beneath at least one of the at least two power/ground pins and adjacent to the via; and

routing at least one electrical signal through the portion of the channel on the first of the plurality of electrically conductive signal layers.

2. The method of claim 1 , wherein the portion of the channek is also located substantially beneath the via.

3. The method of claim 1 , further comprising the step of arranging the surface such that at least one additional set of at least two power/ground pins is electrically connected to a respective via so as to create at least a second portion of the channel on at least the first of the plurality of electrically conductive signal layers, the second portion of the channel being located substantially beneath at least one power/ground pin of each of the at least one additional set of at least two power/ground pins and adjacent to the respective via in order to lengthen the channel.

4. The method of claim 1 , further comprising the step of creating the via as a microvia.

5. The method of claim 1 , further comprising the step of creating a channel on a second of the plurality of electrically conductive signal layers.

6. The method of claim 5 , further comprising the step of routing at least one electrical signal path through the channel on the second of the plurality of signal layers.

7. The method of claim 1 , further comprising the step of forming additional electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to a first of the plurality of electrically conductive signal layers, the additional electrically conductive vias being arranged so as to form a channel in a second of the plurality of electrically conductive signal layers beneath the first plurality of electrically conductive vias.

8. The method of claim 1 , further comprising the step of separating the plurality of electrically conductive signal layers by at least one dielectric layer.

9. The method of claim 1 , further comprising the step of arranging the plurality of electrically conductive vias in order to configure the portion of the channel to have a preselected width.

10. The method of claim 1 , further comprising the step of arranging the plurality of electrically conductive vias in order to configure the portion of the channel to have a pre-selected shape including one of rectangular, square, circular, and diagonal.

11. A multilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board, wherein at least some of the plurality of electrically conductive signal layers are separated by at least one electrically conductive power/ground layer, the multilayer circuit board comprising:

a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers, the surface being arranged such that a set of at least two power/ground pins is electrically connected to a via that extends only partially through the multilayer circuit board so as to create at least a portion of a channel on a first of the plurality of signal layers, the portion of the channel being located substantially beneath at least one of the at least two power/ground pins and adjacent to the via; and

at least one electrical signal path routed through the portion of the channel on the first of the plurality of electrically conductive signal layers.

12. The multilayer circuit board of claim 11 , wherein portion of the channel is also located substantially beneath via.

13. The multilayer circuit board of claim 11 , further comprising at least one additional set of at least two power/ground pins electrically connected to a respective via and being arranged so as to create at least a second portion of the channel on at least the first of the plurality of electrically conductive signal layers, the second portion of the channel being located substantially beneath at least one power/ground pin of each of the at least one additional set of at least two power/ground pins and adjacent to the respective via in order to lengthen the channel.

14. The multilayer circuit board of claim 11 , wherein the via is a microvia.

15. The multilayer circuit board of claim 11 , further comprising a channel on a second of the plurality of electrically conductive signal layers.

16. The multilayer circuit board of claim 15 , further comprising at least one electrical signal path routed through the channel on the second of the plurality of electrically conductive signal layers.

17. The multilayer circuit board of claim 11 , further comprising additional electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to a first of the plurality of electrically conductive signal layers, the additional electrically conductive vias being arranged so as to form a channel in a second of the plurality of electrically conductive signal layers beneath the first plurality of electrically conductive vias.

18. The multilayer circuit board of claim 11 , further comprising at least one dielectric layer separating the plurality of electrically conductive signal layers.

19. The multilayer circuit board of claim 11 , wherein the plurality of electrically conductive vias are arranged so as to configure the portion of the channel to have a preselected width.

20. A method for reducing the number of layers in a mulilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal layers for routning electrical signals to and form at least one electronic component mounted on a surfae of the multilayer circuit board, the method comprising the steps of:

forming a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers;

arranging the surface such that a set of at least two power/ground pins is electrically connected to a via that extends only partially through the multilayer circuit board so as to create at least a portion of a channel on at least a first of the plurality of electrically conductive signal layers, the portion of the channel being located substantially beneath at least one of the at least two power/ground pins; and

routing at least one electrical signal path through the portion of the channel on the first of the plurality of electrically conductive signal layers.

21. The method of claim 20 , wherein the portion of the channel is also located substantially beneath the via.

22. The method of claim 20 , further comprising the step of creating the via as a microvia.

23. A multilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board, the multilayer circuit board comprising:

a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers, the surface being arranged such that a set of at least two power/ground pins is electrically connected to a via that extends only partially through the multilayer circuit board so as to create at least a portion of a channel on a first of the plurality of signal layers, the portion of the channel being located substantially beneath at least one of the at least two power/ground pins; and

at least one electrical signal path routed through the portion of the channel on the first of the plurality of electrically conductive signal layers.

24. The multilayer circuit board of claim 23 , wherein the portion of the channel is also located substantially beneath the via.

25. The multilayer circuit board of claim 23 , wherein the via is a microvia.

26. A method for reducing the number of layers in a multilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board, the method comprising the steps of:

forming a first electrically conductive via in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers;

forming a second electrically conductive via in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers;

arranging the surface such that a set of at least two power/ground pins is electrically connected to the first electrically conductive via so as to create at least a portion of a first channel on at least a first of the plurality of electrically conductive signal layers and to create at least a portion of a second channel on at least a second of the plurality of electrically conductive signal layers, the portion of the first channel being located substantially beneath at least one of the at least two power/ground pins and adjacent to the first electrically conductive via, the portion of the second channel being located substantially beneath the second electrically conductive via; and

routing at least one first electrical signal path through the portion of the first channel on the first of the plurality of electrically conductive signal layers and routing at least one second electrical signal path through the portion of the second channel on the second of the plurality of electrically conductive signal layers.

27. The method of claim 26 , wherein the first of the plurality of electrically conductive signal layers is the same as the second of the plurality of electrically conductive signal layers.

28. The method of claim 26 , wherein the at least one first electrical signal path is the same as the at least one second electrical signal path.

29. A multilayer circuit board, the multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from at least one electronic component mounted on a surface of the multilayer circuit board, the multilayer circuit board comprising:

a first electrically conductive via formed in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers;

a second electrically conductive via formed in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers;

wherein the surface is arranged such that a set of at least two power/ground pins is electrically connected to the first electrically conductive via so as to create at least a portion of a first channel on at least a first of the plurality of electrically conductive signal layers and to create at least a portion of a second channel on at least a second of the plurality of electrically conductive signal layers, the portion of the first channel being located substantially beneath at least one of the at least two power/ground pins and adjacent to the first electrically conductive via, the portion of the second channel being located substantially beneath the second electrically conductive via;

at least one first electrical signal path routed through the portion of the first channel on the first of the plurality of electrically conductive signal layers; and

at least one second electrical signal path routed through the portion of the second channel on the second of the plurality of electrically conductive signal layers.

30. The multilayer circuit board of claim 29 , wherein the first of the plurality of electrically conductive signal layers is the same as the second of the plurality of electrically conductive signal layers.

31. The multilayer circuit board of claim 29 , wherein the at least one first electrical signal path is the same as the at least one second electrical signal path.