IP Library Granted Patent US 7,038,283
Granted Patent B2
US 7,038,283 · App. 10/105,137 · Granted May 2, 2006

Thin film transistor device, method of manufacturing the same and liquid crystal panel

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Quick Facts
Patent No.
US 7,038,283
App. No.
10/105,137
Granted
May 2, 2006
Kind
B2
Abstract

In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.

Claims (11)

1. A thin film transistor device, comprising:

a high-voltage driven thin film transistor formed on a substrate; and

a low-voltage driven thin film transistor formed on said substrate, wherein said low-voltage driven thin film transistor includes:

a first semiconductor film having a first pair of high concentration impurity regions formed so as to sandwich a first channel region;

a first gate insulating film formed on said first channel region of said first semiconductor film, and constituted by a first insulating film only; and

a first gate electrode formed on said first gate insulating film, and

said high-voltage driven thin film transistor including:

a second semiconductor film having a second pair of high concentration impurity regions formed so as to sandwich a second channel region, and low concentration impurity regions formed between said second pair of high concentration impurity regions and said second channel region;

a second gate insulating film formed on said second channel region and said low concentration impurity regions, said second gate insulating film being formed to be thicker than said first gate insulating film and constituted by laminating said first insulating film and a second insulating film; and

a second gate electrode formed on said second gate insulating film.

2. Thin film transistor device according to claim 1 , wherein each of said first and second insulating films is formed of a silicon oxide film.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2005
From: FUJITSU LIMITED
To: SHARP KABUSHIKI KAISHA
Reel/Frame 016345/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2005
From: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
To: FUJITSU LIMITED
Reel/Frame 016345/0310 →