Method and apparatus for debugging in a massively parallel processing environment

1. A method for performing debugging of an executable source program in a massively parallel processing environment comprising:

associating a major cycle counter and a minor cycle counter with each of a plurality of execution processors in the massively parallel processing environment, wherein a minor cycle is an instruction executed by an execution processor during a clock cycle;

obtaining a first stopping point value associated with the major cycle counter and a second stopping point value associated with the minor cycle counter;

executing instructions of the executable source program on each of the plurality of execution processors;

modifying a value of the major cycle counter and a value of the minor cycle counter; and

halting each of the plurality of execution processors and returning control to the user if the value of the major cycle counter reaches the first stopping point value and the value of the minor cycle counter reaches the second stopping point value.

2. The method of claim 1 , further comprising:

inspecting and modifying the executable source program.

3. The method of claim 1 , further comprising:

loading the first stopping point value into the major cycle counter and the second stopping point value into the minor cycle counter; and

adjusting the second stopping point value so that a machine state is one minor cycle removed from the second stopping point value.

4. The method of claim 3 , wherein the first stopping point value is incremented following the completion of a major cycle.

5. The method of claim 3 , wherein the second stopping point value is incremented.

6. The method of claim 1 , further comprising:

storing the first stopping point value in a memory register.

7. The method of claim 1 , further comprising:

storing the second stopping point value in a memory register.

8. The method of claim 1 , further comprising:

storing the value of the major cycle counter in a memory register.

9. The method of claim 1 , further comprising:

storing the value of the minor cycle counter in a memory register.

10. The method of claim 1 , wherein the first stopping point value and the second stopping point value are both zero.

11. The method of claim 1 , wherein the first stopping point value and the second stopping point value are both obtained from a user.

12. The method of claim 1 , wherein modifying the value of the major cycle counter and the value of the minor cycle counter comprises incrementing.

13. The method of claim 1 , wherein modifying the value of the major cycle counter and the value of the minor cycle counter comprises decrementing.

14. The method of claim 1 , wherein the value of the major cycle counter increments after a pre-defined plurality of instructions are executed.

15. The method of claim 1 , wherein the value of the major cycle counter decrements after a pre-defined plurality of instructions are executed.

16. The method of claim 1 , wherein the value of the minor cycle counter increments after a single instruction is executed.

17. The method of claim 1 , wherein the value of the minor cycle counter decrements after a single instruction is executed.

18. A method for performing debugging of an executable source program in a massively parallel processing environment comprising:

associating a major cycle counter and a minor cycle counter with each of a plurality of execution processors in the massively parallel processing environments, wherein a minor cycle is an instruction executed by an execution processor during a clock cycle;

obtaining a first stopping point value associated with the major cycle counter and a second stopping point value associated with the minor cycle counter;

executing instructions of the executable source program on each of the plurality of execution processors;

modifying a value of the major cycle counter and a value of the minor cycle counter;

halting each of the plurality of execution processors and returning control to the user if the value of the major cycle counter reaches the first stopping point value and the value of the minor cycle counter reaches the second stopping point value;

inspecting and modifying the executable source program;

storing the first stopping point value in a memory register;

storing the second stopping point value in a memory register;

storing the value of the major cycle counter in a memory register; and

storing the value of the minor cycle counter in a memory register.

19. An execution control system configured for a massively parallel processing environment comprising:

a major cycle counter and a minor cycle counter configured to be associated with each of a plurality of execution processors in the massively parallel processing environment, wherein a minor cycle is an instruction executed by an execution processor during a clock cycle;

a memory register to store a first stopping point value associated with the major cycle counter;

a memory register to store a second stopping point value associated with the minor cycle counter; and

an executable source program;

wherein each of the plurality of execution processors is halted and control is returned to the user to inspect and modify the executable source program if the first stopping point value is equal to a value of the major cycle counter and second stopping point value is equal to a value of the minor cycle counter.

20. The system of claim 19 , further comprising:

a memory register to store the value of the major cycle counter.

21. The system of claim 19 , further comprising:

a memory register to store the value of the minor cycle counter.

22. The system of claim 19 , wherein the first stopping point value and the second stopping point value are both zero.

23. The system of claim 19 , wherein the first stopping point value and the second stopping point value are both obtained from a user.

24. The system of claim 19 , wherein the second stopping point value is incremented so that a machine state is one minor cycle removed from a previous stopping point value prior to restarting the plurality of execution processors.

25. The system of claim 19 , wherein the value of the major cycle counter increments after a pre-defined plurality of instructions are executed.

26. The system of claim 19 , wherein the value of the major cycle counter decrements after a pre-defined plurality of instructions are executed.

27. The system of claim 19 , wherein the value of the minor cycle counter increments after a single instruction is executed.

28. The system of claim 19 , wherein the value of the minor cycle counter decrements after a single instruction is executed.

29. An execution control system configured for a massively parallel processing environment comprising:

a major cycle counter and a minor cycle counter configured to be associated with each of a plurality of execution processors in the massively parallel processing environment, wherein a minor cycle is an instruction executed by an execution processor during a clock cycle;

a memory register to store a first stopping point value associated with the major cycle counter;

a memory register to store a second stopping point value associated with the minor cycle counter;

an executable source program;

a memory register to store a value of the major cycle counter; and

a memory register to store a value of the minor cycle counter;

wherein each of the plurality of execution processors is halted and control is returned to the user to inspect and modify the executable source program if the first stopping point value is equal to the value of the major cycle counter and second stopping point value is equal to the value of the minor cycle counter.

30. A computer system to perform debugging of an executable source program in a massively parallel processing environment, comprising:

a processor;

a memory; and

software instructions stored in the memory for enabling the computer system under control of the processor, to perform:

associating a major cycle counter and a minor cycle counter with each of a plurality of execution processors in the massively parallel processing environments, wherein a minor cycle is an instruction executed by an execution processor during a clock cycle;

obtaining a first stopping point value associated with the major cycle counter and a second stopping point value associated with the minor cycle counter;

executing instructions of the executable source program on each of the plurality of execution processors;

modifying a value of the major cycle counter and a value of the minor cycle counter; and

halting each of the plurality of execution processors and returning control to the user if the value of the major cycle counter reaches the first stopping point value and the value of the minor cycle counter reaches the second stopping point value.

31. An apparatus for performing debugging of an executable source program in a massively parallel processing environment comprising:

means for associating a major cycle counter and a minor cycle counter with each of a plurality of execution processors in the massively parallel processing environment, wherein a minor cycle is an instruction executed by an execution processor during a clock cycle;

means for obtaining a first stopping point value associated with the major cycle counter and a second stopping point value associated with the minor cycle counter;

means for executing instructions of the executable source program on each of the plurality of execution processors;

means for modifying a value of the major cycle counter and a value of the minor cycle counter; and

means for halting each of the plurality of execution processors and returning control to the user if the value of the major cycle counter reaches the first stopping point value and the value of the minor cycle counter reaches the second stopping point value.