Emulation of a high-speed, high-stability clock
View Patent ↗A method and apparatus for emulating a high-precision, high-accuracy clock. In one embodiment, two clocks are used in the emulation. The first clock has precision greater than precision of the second clock and accuracy less than accuracy of the second clock. A checkpoint time relative to elapsed cycles of the second clock and a checkpoint cycle count of cycles of the first clock are periodically stored relative to a checkpoint period that lasts for a selected number of cycles of the second clock. A reference cycle rate of the first clock is calculated relative to the cycle rate of the second clock. The current time is determined as a function of the checkpoint time, a number of cycles of the first clock elapsed since storing the most recent checkpoint cycle count, and the reference cycle rate of the first clock.
1. A computer-implemented method for emulating a high-precision, high-accuracy clock using a first clock and a second clock, comprising:
periodically storing, relative to a checkpoint period lasting for a selected number of cycles of the second clock, a checkpoint time indicating a number of elapsed cycles of the second clock at the end of the period and a checkpoint cycle count indicating a number of elapsed cycles of the first clock at the end of the period, wherein the first clock operates with a greater rate of oscillation and lesser accuracy than the second clock;
calculating a first-clock-delta value as a difference between a current count of elapsed cycles of the first clock and a most recently stored checkpoint cycle count of the first clock;
converting the first-clock-delta value to units compatible with a most recently stored checkpoint time of the second clock; and;
determining a current time as a sum of the most recently stored checkpoint time and the first-clock-delta value;
periodically calculating, according to the checkpoint period, a reference cycle rate of the first clock relative to the rate of oscillation of the second clock and using the reference cycle rate in converting the first-clock-delta value to units compatible with the most recently stored checkpoint time of the second clock;
finding a current rate of oscillation of the first clock relative to the rate of oscillation of the second clock; and
in response to an absolute value of a difference between the current rate of oscillation of the first clock and the reference cycle rate being less than a selected first threshold, changing the reference cycle rate by one-eighth the difference between the current rate of oscillation of the first clock and the reference cycle rate.
2. The method of claim 1 , further comprising reporting an error condition if an absolute difference between the current rate of oscillation of the first clock and the reference cycle rate is not less than a selected second threshold.
3. A computer-implemented method for emulating a high-precision, high-accuracy clock using a first clock and a second clock, comprising:
generating an initial value for a reference cycle rate for the first clock;
periodically saving a first checkpoint cycle count that indicates a total of elapsed cycles of the first clock according to a checkpoint period lasting for one or more cycles of the second clock, wherein the first clock operates with a greater rate of oscillation and lesser accuracy than the second clock, and the second clock rate having an assigned constant value;
periodically saving a second checkpoint cycle count, concurrent with saving the first checkpoint cycle count, wherein the second checkpoint cycle count indicates a total of elapsed cycles of the second clock according to the checkpoint period;
periodically generating an observed cycle rate of the first clock according to the first period and using the second checkpoint cycle count, a current cycle count of the second clock, and the constant value of the second clock rate;
adjusting the reference cycle rate as a function of the observed cycle rate;
calculating a first-clock-delta value as a difference between a current count of elapsed cycles of the first clock and a most recently saved first checkpoint cycle count of the first clock;
converting the first-clock-delta value to units compatible with a most recently saved second checkpoint time of the second clock and adjusting the first-clock-delta value as a function of the reference cycle rate; and
indicating a current time value as a sum of the most recently saved second checkpoint cycle count and the first-clock-delta value;
determining a current cycle rate from the second checkpoint cycle count, a current cycle count of the second clock, the cycle rate of the second clock, the first checkpoint cycle count, and a current cycle count of the first clock; and
in response to an absolute value of a difference between the current cycle rate and the reference cycle rate being less than a selected first threshold, changing the reference cycle rate by one-eighth the difference between the current cycle rate and the reference cycle rate.
4. The method of claim 3 , wherein a plurality of homogenous processors are inter-coupled, and each processor has a respective first clock and second clock, further comprising:
generating the observed cycle rate at a selected one of the processors;
updating respective first checkpoint cycle counts on all the processors as a function of the observed cycle rate; and
at each processor, indicating a current time value as a function of the respective second checkpoint cycle counts, the reference cycle rate, and a number of cycles of the respective first clock elapsed since the saved second checkpoint cycle count.
5. The method of claim 4 , further comprising generating the initial value for the reference cycle rate as a function of observed cycle rates of respective first clocks on the plurality of processors.
6. The method of claim 5 , wherein the initial value for the reference cycle rate is an average of observed cycle rates of respective first clocks on the plurality of processors.
7. The method of claim 3 , further comprising if the absolute value of the difference between the current cycle rate and the reference cycle rate is not less than a selected first threshold and is less than a second selected threshold, then after waiting for an interval that is less than the checkpoint period, saving a current cycle count of the first clock as the first checkpoint cycle count, saving a current cycle count of the second clock as the second checkpoint cycle count, generating an observed cycle rate of the first clock using the second checkpoint cycle count, a current cycle count of the second clock, and the constant value of the second clock rate.
8. An apparatus for emulating a high-precision, high-accuracy clock using a first clock and a second clock, comprising:
means for periodically storing, relative to a checkpoint period lasting for a selected number of cycles of the second clock, a checkpoint time indicating a number of elapsed cycles of the second clock at the end of the period and a checkpoint cycle count indicating a number of elapsed cycles of the first clock at the end of the period, wherein the first clock operates with a greater rate of oscillation and lesser accuracy than the second clock;
means for calculating a first-clock-delta value as a difference between a current count of elapsed cycles of the first clock and a most recently stored checkpoint cycle count of the first clock;
means for converting the first-clock-delta value to units compatible with a most recently stored checkpoint time of the second clock; and;
means for determining a current time as a sum of the most recently stored checkpoint time and the first-clock-delta value;
means for periodically calculating, according to the checkpoint period, a reference cycle rate of the first clock relative to the rate of oscillation of the second clock and using the reference cycle rate in converting the first-clock-delta value to units compatible with the most recently stored checkpoint time of the second clock;
means for finding a current rate of oscillation of the first clock relative to the rate of oscillation of the second clock; and
means, responsive to an absolute value of a difference between the current rate of oscillation of the first clock and the reference cycle rate being less than a selected first threshold, for changing the reference cycle rate by one-eighth the difference between the current rate of oscillation of the first clock and the reference cycle rate.
9. An apparatus for emulating a high-precision, high-accuracy clock using a first clock and a second clock, comprising:
means for generating an initial value for a reference cycle rate for the first clock;
means for periodically saving a first checkpoint cycle count that indicates a total of elapsed cycles of the first clock according to a checkpoint period lasting for one or more cycles of the second clock, wherein the first clock operates with a greater rate of oscillation and lesser accuracy than the second clock, and the second clock rate having an assigned constant value;
means for periodically saving a second checkpoint cycle count, concurrent with saving the first checkpoint cycle count, wherein the second checkpoint cycle count indicates a total of elapsed cycles of the second clock according to the checkpoint period;
means for periodically generating an observed cycle rate of the first clock according to the first period and using the second checkpoint cycle count, a current cycle count of the second clock, and the constant value of the second clock rate;
means, responsive to an absolute value of a difference between the observed cycle rate and the reference cycle rate being less than a selected first threshold, for changing the reference cycle rate by one-eighth the difference between the observed cycle rate and the reference cycle rate;
means for calculating a first-clock-delta value as a difference between a current count of elapsed cycles of the first clock and a most recently stored first checkpoint cycle count of the first clock;
means for converting the first-clock-delta value to units compatible with a most recently stored second checkpoint time of the second clock and for adjusting the first-clock-delta value as a function of the reference cycle rate; and
means for indicating a current time value as a sum of the most recently stored second checkpoint cycle count and the first-clock-delta value.
10. A processor arrangement comprising:
a bus;
a real-time clock coupled to the bus; and
a processor coupled to the bus and including an internal clock, wherein the internal clock has a first clock rate with precision greater than precision of a second clock rate of the real-time clock and accuracy less than accuracy of the real-time clock, wherein the processor is configured to
generate an initial value for a reference cycle rate for the internal clock;
periodically save, according to a checkpoint period, a first checkpoint cycle count that indicates a total of elapsed cycles of the internal clock, wherein the checkpoint period lasts for one or more cycles of the real-time clock;
periodically save a second checkpoint cycle count, concurrent with saving the first checkpoint cycle count, wherein the second checkpoint cycle count indicates a total of elapsed cycles of the real-time clock according to the checkpoint period;
periodically generate an observed cycle rate of the internal clock according to the first period and using the second checkpoint cycle count, a current cycle count of the real-time clock, and the constant value of the second clock rate;
change, in response to an absolute value of a difference between the observed cycle rate and the reference cycle rate being less than a selected first threshold, the reference cycle rate by one-eighth the difference between the observed cycle rate and the reference cycle rate;
calculate a first-clock-delta value as a difference between a current count of elapsed cycles of the internal clock and a most recently stored first checkpoint cycle count of the internal clock;
convert the first-clock-delta value to units compatible with a most recently stored second checkpoint time of the real-time clock and adjust the first-clock-delta value as a function of the reference cycle rate; and
indicate a current time value as a sum of the most recently saved second checkpoint cycle count and the first-clock-delta value.