Frequency correction system for a wireless device communicating in a wireless local area network
View Patent ↗A wireless transceiver including an oscillator, a radio, a baseband processor and MAC device that performs apiori frequency offset correction. The radio converts between RF signals and baseband signals. The baseband processor includes a frequency correction loop, an inverter and a combiner. The frequency correction loop generates a frequency offset signal based on a frequency difference between an oscillator reference frequency and frequency of a received signal. The inverter inverts the frequency offset signal and the combiner adjusts frequency of a transmit signal by the inverted frequency offset signal. The MAC processes received packets, identifies packets received from an AP, provides packets to the baseband processor for transmission, and controls the baseband processor to adjust transmit signals to a frequency of the AP. The baseband processor may include a memory or filter to store or update frequency offset values.
1. A frequency correction system for a wireless device operating in a wireless LAN in which communications are coordinated via a central hub, comprising:
a frequency correction circuit that determines a frequency differential between a local frequency reference signal and a received signal and that provides a frequency offset signal indicative thereof;
an inverter, coupled to the frequency correction circuit, that inverts the frequency offset signal and that provides an inverted frequency offset signal;
a combiner, coupled to the inverter, that adjusts frequency of a transmit signal by the inverted frequency offset signal; and
a controller, coupled to the frequency correction circuit, the inverter and the combiner, that controls whether a transmit signal is adjusted in frequency by the inverted frequency offset signal wherein the controller detects signals received from the central hub and controls the inverter and combiner to adjust transmit frequency to correspond to a frequency of at least one signal received from the central hub.
2. The frequency correction system of claim 1 , further comprising:
a memory, coupled to the frequency correction circuit, the controller and the inverter, that stores a frequency offset value indicative of the frequency offset signal; and
the inverter generating the inverted frequency offset signal based on the stored frequency offset value.
3. The frequency correction system of claim 2 , wherein the memory further comprises a filter controlled by the controller to adjust the frequency offset value for each new signal received from the central hub.
4. The frequency correction system of claim 3 , wherein the filter averages a predetermined number of frequency offset values based on the last predetermined number of signals received from the central hub.
5. The frequency correction system of claim 1 , wherein the frequency correction circuit comprises:
a frequency detector that asserts a frequency signal indicative of a received signal; and
a phase-locked loop, coupled to the frequency detector, that compares the frequency signal with a reference frequency signal and that provides a corresponding frequency offset signal.
6. The frequency correction system of claim 1 , wherein the combiner comprises a complex multiplier.
7. A wireless transceiver for communicating in a wireless LAN in which communications are coordinated via an access point (AP), comprising:
an oscillator that generates a frequency reference signal;
a radio, coupled to the oscillator, that converts radio frequency (RF) signals transmitted in a wireless medium into baseband signals and that converts baseband signals into RF signals for transmission in the wireless medium;
a baseband processor, coupled to the oscillator and the radio, comprising:
a frequency correction loop that generates a frequency offset signal based on a frequency difference between a reference frequency and a received signal and that uses the frequency offset signal to synchronize the received signal;
a received circuit, coupled to the frequency correction loop, that de-formats the adjusted received signal into packets;
an inverter, coupled to the frequency correction loop, that inverts the frequency offset signal and that provides an inverted frequency offset signal; and
a combiner, coupled to the inverter, that adjusts frequency of a transmit signal by the inverted frequency offset signal; and
a media access control (MAC) device, coupled to the baseband processor, that processes received packets, that identifies packets received from the AP, that provides packets to the baseband processor for transmission, and that controls the baseband processor to adjust transmit signals to a frequency of the AP.
8. The wireless transceiver of claim 7 , further comprising:
the baseband processor including a memory, coupled to the frequency correction loop and the inverter, that stores a frequency offset value based on at least one frequency offset signal; and
the MAC device controlling the memory to update a frequency offset value using a frequency offset signal based on a signal received from the AP.
9. The wireless transceiver of claim 8 , wherein the memory replaces a stored frequency offset value with a new frequency offset value.
10. The wireless transceiver of claim 8 , wherein the memory incorporates a filter that averages a plurality of frequency offset values.
11. The wireless transceiver of claim 7 , wherein the frequency correction loop comprises:
a frequency detector that asserts a frequency signal indicative of frequency of a received signal;
a phase-locked loop (PLL), coupled to the frequency detector and the crystal oscillator, that generates a frequency offset signal; and
a complex multiplier, coupled to the PLL and the receive circuit, that adjusts frequency of the received signal by the frequency offset signal.
12. The wireless transceiver of claim 7 , the baseband processor further comprising:
a transmit circuit that formats packets received from the MAC into transmit signals; and
the combiner comprising a complex multiplier that combines transmit signals from the transmit circuit with inverted frequency offset signals from the inverter.
13. A method of apriori frequency offset for a wireless transceiver communicating in a wireless LAN in which communications are coordinated via a central hub, comprising:
generating a frequency offset signal in response to a received signal;
determining whether the received signal was transmitted from the central hub;
inverting the frequency offset signal if the received signal is from the central hub; and
adjusting a transmit signal using the inverted frequency offset signal; and
storing a frequency offset value representing a frequency offset signal wherein
said inverting comprising generating the inverted frequency offset signal based on the stored frequency offset value.
14. The method of claim 13 , wherein said storing comprises replacing a stored frequency offset value with a new frequency offset value generated in response to a new received signal from the central hub.
15. The method of claim 13 , wherein said storing comprises updating a stored frequency offset value using a new frequency offset value generated in response to a new received signal from the central hub.
16. The method of claim 15 , wherein said updating comprises averaging a plurality of frequency offset values each generated in response to a signal received from the central hub.
17. The method of claim 13 , wherein said generating a frequency offset signal comprises:
determining a frequency of the received signal;
comparing the frequency of the received signal with a reference frequency.
18. The method of claim 13 , wherein said adjusting a transmit signal comprises complex multiplying a transmit signal with an inverted frequency offset value.