IP Library Granted Patent US 8,208,592
Granted Patent B2
US 8,208,592 · App. 10/117,372 · Granted Jun 26, 2012

Receiver

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Quick Facts
Patent No.
US 8,208,592
App. No.
10/117,372
Granted
Jun 26, 2012
Kind
B2
Abstract

A receiver and a method for a receiver is disclosed. The receiver comprises a signal processing path for receiving a first signal modulated by a first modulation method and having a first bandwidth and a second signal modulated by a second modulation method and having a second bandwidth. A common gain control function is provided for processing said first and second signals. A common DC offset cancellation is also provided for said first and second signals. In a preferred embodiment the gain control and the DC offset cancellation a provided by a single circuit.

Claims (47)

1. An apparatus comprising:

a signal processing path for receiving a first signal modulated by a first modulation method and having a first bandwidth and a second signal modulated by a second modulation method and having a second bandwidth;

a single circuit for providing both DC offset control and gain control for said first and second signals;

wherein the single circuit comprises a first input for the signals and a second input for a reference signal and the output of the common gain control circuit is controlled in response to the reference signal.

2. An apparatus as claimed in claim 1 , wherein the single circuit is provided by an inverting amplifier.

3. An apparatus as claimed in claim 2 , wherein said inverting amplifier comprises: an operational amplifier; a circuit connected on the signal path at a first location before the operational amplifier and a second location after the operational amplifier, said circuit being provided with a resistor; and a further resistor on the signal path at a location before said first location.

4. An apparatus as claimed in claim 1 , wherein the reference signal comprises a reference voltage supplied by a device that receives the signal from the output of the single circuit.

5. An apparatus as claimed in claim 4 , wherein the output voltage of the single circuit is adjusted to equal the reference voltage.

6. An apparatus as claimed in claim 1 , wherein the signal processing path comprises buffering means.

7. An apparatus as claimed in claim 6 , wherein the signal processing path is adapted for a sample/hold type operation.

8. An apparatus as claimed in claim 6 , comprising a further circuit for provision of a connection between the output of the single circuit and input of the buffering means.

9. An apparatus as claimed in claim 8 , wherein the further circuit is adapted for switching between on and off states.

10. An apparatus as claimed in claim 1 , comprising a sensing circuit connected between an input and output of an operational amplifier of the single circuit.

11. An apparatus as claimed in claim 10 , wherein the sensing circuit comprises a RC lowpass filter.

12. An apparatus as claimed in claim 1 , wherein the modulation of the first signal is based on wideband code division multiple access.

13. An apparatus as claimed in claim 1 , wherein the first signal comprises a signal from a transmitter of a third generation communication system.

14. An apparatus as claimed in claim 13 , wherein the communication system is based on a universal mobile telecommunications service (UMTS) standard.

15. An apparatus as claimed in claim 1 , wherein the modulation of the second signal is based on Gaussian-filtered Minimum Shift Keying.

16. An apparatus as claimed in claim 1 , wherein the second signal comprises a signal from a transmitter of a GSM communication system.

17. A method in a receiver comprising:

receiving in a signal processing path of the receiver a first signal modulated by a first modulation method and having a first bandwidth;

receiving in said signal processing path a second signal modulated by a second modulation method and having a second bandwidth;

processing said first signal and said second signal in a single circuit providing common gain control function and a common DC offset cancelling function;

inputting a reference signal into the common gain control function; and

controlling the output of the common gain control function in response to the reference signal.

18. A method as claimed in claim 17 , wherein the single circuit comprises an operational amplifier provided with a first and a second input that are kept in a fixed potential.

19. A method as claimed in claim 17 , wherein the DC level of the output of the signal processing path is adjusted based on the reference signal.

20. A method as claimed in claim 17 , wherein the reference signal comprises a current drawn from a stage that precedes the common DC offset cancelling function.

21. A receiver comprising:

a signal processing path for receiving a first signal modulated by a first modulation method and having a first bandwidth and a second signal modulated by a second modulation method and having a second bandwidth; and

a single circuit for providing a common gain control circuit for said first and second signals and a common DC offset cancelling circuit for said first and second signals, wherein the gain control circuit comprises an operational amplifier provided with a first input for the signals and a second input for a reference signal, a subcircuit connected on the signal path at a first location before the operational amplifier and a second location after the operational amplifier, said subcircuit being provided with a resistor, and a further resistor on the signal path at a location before said first location.

22. A method in a receiver comprising:

receiving in a signal processing path of the receiver a first signal modulated by a first modulation method and having a first bandwidth;

receiving in said signal processing path a second signal modulated by a second modulation method and having a second bandwidth;

processing said first signal and said second signal in a single circuit providing a common gain control function and a common DC offset cancelling function, wherein the gain control function of the single circuit comprises an operational amplifier provided with a first and a second input and the first and second signals are received in the first input of the gain control function;

receiving a reference signal in the second input of the common gain control function; and

maintaining the first input and the second input in a fixed potential by means of a subcircuit, the subcircuit being connected on the signal path at a first location before the operational amplifier and a second location after the operational amplifier and comprising a resistor, and a further resistor on the signal path at a location before said first location.

23. An apparatus comprising:

a signal processing path configured to receive a first signal modulated by a first modulation scheme and a second signal modulated by a second modulation second, wherein the first signal and the second signal are received over a radio communication system; and

a single circuit for providing DC offset control and gain control for the first signal and the second signal,

wherein the single circuit includes a first input for the signals and a second input for a reference signal, and the output of the single circuit is controlled in response to the reference signal.

24. An apparatus as claimed in claim 23 , wherein the single circuit is configured to fix a DC level at the output regardless of the DC level at the input.

25. A method comprising:

receiving a first signal modulated by a first modulation scheme and a second signal modulated by a second modulation second, wherein the first signal and the second signal are received over a radio communication system; and

providing DC offset control and gain control, using a single circuit, for the first signal and the second signal,

wherein the single circuit includes a first input for the signals and a second input for a reference signal, and the output of the single circuit is controlled in response to the reference signal.

26. A method as claimed in claim 25 , wherein the single circuit is configured to fix a DC level at the output regardless of the DC level at the input.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2015
From: NOKIA CORPORATION
To: NOKIA TECHNOLOGIES OY
Reel/Frame 035551/0543 →