IP Library Granted Patent US 6,846,698
Granted Patent B2
US 6,846,698 · App. 10/126,273 · Granted Jan 25, 2005

Semiconductor wafer handling method

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Quick Facts
Patent No.
US 6,846,698
App. No.
10/126,273
Granted
Jan 25, 2005
Kind
B2
Abstract

A method of handling a semiconductor wafer from which a plurality of semiconductor devices are to be fabricated during a semiconductor device fabrication process. The method includes the steps of attaching a flexible connected layer to a semiconductor wafer layer mounted on a carrier substrate and separating the wafer layer from the carrier substrate while supported by the flexible connected layer.

Claims (18)

1. A method of handling a semiconductor wafer from which a plurality of semiconductor devices are to be fabricated during a semiconductor device fabrication process, comprising the steps of:

providing a semiconductor wafer layer mounted on a carrier substrate;

forming a trench through the semiconductor wafer layer and between adjacent devices;

attaching a flexible connected layer to the semiconductor wafer layer, at least a part of the material of the flexible connected layer being present in the trenches;

removing a part of the material of the flexible connected layer within the trenches; and

separating the wafer layer from the carrier substrate while supported by the flexible connected layer.

2. A method as claimed in claim 1 , and including the step of placing the separated wafer layer onto an expandable film.

3. A method as claimed in claim 2 , and including the step of expanding the expandable film to separate individual semiconductor devices.

4. A method as claimed in claim 1 , in which the semiconductor wafer layer has a thickness less than substantially 125:μm.

5. A method as claimed in claim 4 , in which the semiconductor wafer layer has a thickness less than substantially 40:μm.

6. A method as claimed in claim 1 , in which the material of the wafer is GaAs.

7. A method as claimed in claim 1 , in which the wafer has a diameter corresponding to a mass production facility.

8. A method as claimed in claim 1 , and including the step of mechanically separating adjacent semiconductor devices.

9. A method as claimed in claim 1 , and including the step of chemically separating adjacent semiconductor devices.

10. A method as claimed in claim 1 , in which the flexible connected layer is a composite layer.

11. A method as claimed in claim 10 , in which the composite layer comprises layers of different materials.

12. A method as claimed in claim 10 , in which the composite layer comprises a layer having parts of different materials.

13. A method as claimed in claim 12 , in which the composite layer is a single layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2019
From: RFMD (UK) LIMITED
To: QORVO US, INC.
Reel/Frame 051330/0388 →
CHANGE OF NAME Recorded Apr 16, 2009
From: FILTRONIC COMPOUND SEMICONDUCTORS LIMITED
To: RFMD (UK) LIMITED
Reel/Frame 022552/0462 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2002
From: O'KEEFE, MATTHEW FRANCIS; CULLEN, JOHN MELVYN
To: FILTRONIC COMPOUND SEMICONDUCTOR LIMITED
Reel/Frame 013107/0003 →