Method for making a stack of capacitors, in particular for dynamic random access memory [DRAM]
View Patent ↗The invention concerns a method which consists in forming on a substrate ( 1 ) coated with a dielectric material layer ( 3 ) provided with a window ( 3 a ), a stack of successive layers alternately of germanium or SiGe alloy ( 4, 6, 8 ) and polycrystalline silicon ( 5, 7, 9 ); selective partial elimination of the germanium or SiGe alloy layers, to form an tree-like structure; forming a thin layer of dielectric material ( 10 ) on the tree-like structure; and coating the tree-like structure with polycrystalline silicon ( 11 ). The invention is useful for making dynamic random-access memories.
1. A semiconductor device comprising:
a semiconductor substrate; and
at least one capacitor adjacent said semiconductor substrate and comprising
alternating layers including at least one germanium layer and at least one polycrystalline silicon layer extending laterally outwardly therefrom defining a tree structure,
a dielectric layer on outer portions of the tree structure, and
an electrical conductor on outer portions of the dielectric layer.
2. A semiconductor device in accordance with claim 1 wherein said at least one germanium layer comprises between 10% and 100% germanium.
3. A semiconductor device in accordance with claim 1 wherein said at least one germanium layer comprises between 25% and 55% germanium.
4. A semiconductor device in accordance with claim 1 wherein said substrate comprises a conductive surface portion, and wherein said alternating layers comprise a first germanium layer contacting said conductive surface portion.
5. A semiconductor device in accordance with claim 4 wherein said conductive surface portion comprises a doped semiconductor surface portion.
6. A semiconductor device in accordance with claim 1 wherein said alternating layers comprise an uppermost polycrystalline silicon layer.
7. A semiconductor device according to claim 1 wherein the at least one polycrystalline silicon layer defines at least one gap with adjacent portions;
and wherein said dielectric layer is relatively thin to preserve the at least one gap.
8. A dynamic random access memory (DRAM) device comprising:
a semiconductor substrate and a plurality of memory cells formed thereon, each memory cell comprising a capacitor;
said capacitor comprising
alternating layers including at least one germanium layer and at least one polycrystalline silicon layer extending laterally outwardly therefrom defining a tree structure,
a dielectric layer on outer portions of the tree structure, and
an electrical conductor on outer portions of the dielectric layer.
9. A DRAM device in accordance with claim 8 wherein said at least one germanium layer comprises between 10% and 100% germanium.
10. A DRAM device in accordance with claim 8 wherein said at least one germanium layer comprises between 25% and 55% germanium.
11. A DRAM device in accordance with claim 8 wherein said semiconductor substrate comprises a conductive surface portion, and wherein said alternating layers comprise a first germanium layer contacting said conductive surface portion.
12. A DRAM device in accordance with claim 11 wherein said conductive surface portion comprises a doped semiconductor surface portion.
13. A DRAM device in accordance with claim 8 wherein said alternating layers comprise an uppermost polycrystalline silicon layer.
14. A DRAM device in accordance with claim 8 wherein the at least one polycrystalline silicon layer defines at least one gap with adjacent portions; and wherein said dielectric layer is relatively thin to preserve the at least one gap.