Gigabit ethernet adapter
View Patent ↗A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an Internet tuner core, peripherals, and external interfaces. A network stack processes, generates and receives network packets. An internal programmable processor controls the network stack and handles any other types of ICMP packets, IGMP packets, or packets corresponding to other protocols not supported directly by dedicated hardware. A virtual memory manager is implemented in optimized, hardwired logic. The virtual memory manager allows the use of a virtual number of network connections which is limited only by the amount of internal and external memory available.
1. An apparatus for decoding and encoding network protocols and processing data, comprising:
a network stack for receiving and transmitting packets and for encoding and decoding packets; and
a plurality of dedicated hardwired logic protocol modules;
wherein each protocol module is optimized for a specific network protocol;
wherein said protocol modules execute in parallel;
wherein said protocol modules include a Transmission Control Protocol (TCP) protocol module;
wherein said TCP protocol module supports TCP protection against wrapped sequence numbers (PAWS) using dedicated and optimized hardwired logic.
2. An apparatus for decoding and encoding network protocols and processing data, comprising:
a network stack for receiving and transmitting packets and for encoding and decoding packets;
a plurality of dedicated hardwired logic protocol modules; and
an Internet Protocol (IP) identification generator module that uses dedicated optimized hardwired logic to generate an identification field for IP packets that has a true random distribution and prevents attempts to predict future values of the identification field;
wherein each protocol module is optimized for a specific network protocol;
wherein said protocol modules execute in parallel.
3. A process for decoding and encoding network protocols and processing data, comprising:
providing a network stack for receiving and transmitting packets and for encoding and decoding packets; and
providing a plurality of dedicated protocol state machines;
wherein each protocol state machine is optimized for a specific network protocol;
wherein said protocol state machines execute in parallel;
wherein said protocol state machines include a Transmission Control Protocol (TCP) protocol state machine;
wherein said TCP protocol state machine supports TCP protection against wrapped sequence numbers (PAWS) using dedicated and optimized hardwired logic.
4. A process for decoding and encoding network protocols and processing data, comprising:
providing a network stack for receiving and transmitting packets and for encoding and decoding packets;
providing a plurality of dedicated protocol state machines; and
providing an Internet Protocol (IP) identification generator module that uses dedicated optimized hardwired logic to generate an identification field for IP packets that has a true random distribution and prevents attempts to predict future values of the identification field;
wherein each protocol state machine is optimized for a specific network protocol;
wherein said protocol state machines execute in parallel.