IP Library Granted Patent US 6,993,300
Granted Patent B2
US 6,993,300 · App. 10/131,213 · Granted Jan 31, 2006

Accurate gain direct modulation (KMOD) using a dual-loop PLL

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Quick Facts
Patent No.
US 6,993,300
App. No.
10/131,213
Granted
Jan 31, 2006
Kind
B2
Abstract

The present invention provides a baseband RF clock synthesizer having particular use in a BLUETOOTH piconet device, which has the capability of providing simple and accurate calibration of modulation path gain (KMOD) by introducing a dual-loop phase locked loop (PLL) in the RF clock signal synthesizer. The disclosed technique and apparatus controls the maximum frequency deviation by the difference of two locked frequencies, one frequency in each path of the dual-path PLL. Once the PLL is locked within some frequency error, the present technique and apparatus calibrates for the deviation of amplitude of the modulation due to the modulation path. Accordingly, modulation gain (KMOD) calibration is provided by adding an auxiliary loop to a PLL in an RF frequency synthesizer.

Claims (49)

1. A phase locked loop in an RF transmission system, comprising:

a first forward path to lock on a transmission channel frequency of said RF transmission system; and

a second forward path to lock on an error offset associated with modulation gain through said phase locked loop; and

a common feedback path used by both said first forward path and said second forward path.

2. The phase locked loop in an RF transmission system according to claim 1 , wherein said common feedback path comprises:

a frequency divider.

3. The phase locked loop in an RF transmission system according to claim 1 , wherein:

said first forward path and said second forward path utilize a common phase comparator.

4. The phase locked loop in an RF transmission system according to claim 1 , wherein:

said first forward path and said second forward path utilize a common voltage controlled oscillator.

5. The phase locked loop in an RF transmission system according to claim 1 , wherein said first forward path comprises:

a charge pump; and

a loop filter.

6. The phase locked loop in an RF transmission system according to claim 5 , wherein said first forward path further comprises:

a varactor receiving an output from said loop filter.

7. The phase locked loop in an RF transmission system according to claim 1 , wherein:

said RF transmission system is part of a piconet device.

8. The phase locked loop in an RF transmission system according to claim 7 , wherein:

said piconet device conforms to a BLUETOOTH standard.

9. The phase locked loop in an RF transmission system according to claim 1 , wherein said second forward path comprises:

a charge pump;

a loop filter; and

a data injector.

10. The phase locked loop in an RF transmission system according to claim 9 , wherein said second forward path further comprises:

a varactor receiving an output from said loop filter.

11. The phase locked loop in an RF transmission system according to claim 9 , wherein said data injector comprises:

a voltage controlled current source in series with a deviation multiplier.

12. A method of transmitting a data signal accurately in a transmission channel, comprising:

activating a first loop of a phase locked loop to lock a first main loop of said phase locked loop to a transmit channel frequency;

activating a second loop of said phase locked loop to lock the phase locked loop to said transmit channel frequency plus a deviation; and

reactivating said first loop of said phase locked loop and modulating data directly to a voltage controlled oscillator of said phase locked loop;

whereby modulation gain is calibrated.

13. The method of transmitting a data signal accurately in a transmission channel according to claim 12 , wherein:

said first main loop is deactivated when said second loop is active.

14. The method of transmitting a data signal accurately in a transmission channel according to claim 13 , wherein:

said first main loop is deactivated by tri-stating a charge pump therein.

15. The method of transmitting a data signal accurately in a transmission channel according to claim 12 , wherein:

said second loop is deactivated when said first main loop is active.

16. The method of transmitting a data signal accurately in a transmission channel according to claim 12 , wherein:

during an entire data transmission cycle, one of said first loop and said second loop are tri-stated to maintain a bias voltage on a respective loop filter therein.

17. The method of transmitting a data signal accurately in a transmission channel according to claim 16 , further comprising:

buffering an output of a loop filter in said second loop.

18. Apparatus for transmitting a data signal accurately in a transmission channel, comprising:

means for activating a first loop of a phase locked loop to lock a first main loop of said phase locked loop to a transmit channel frequency;

means for activating a second loop of said phase locked loop to lock the phase locked loop to said transmit channel frequency plus a deviation, while deactivating said first loop; and

means for reactivating said first loop of said phase locked loop and modulating data directly to a voltage controlled oscillator of said phase locked loop;

whereby modulation gain is calibrated.

19. The apparatus for transmitting a data signal accurately in a transmission channel according to claim 18 , further comprising:

means for buffering an output of a loop filter in said second loop.

Assignments (5)
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035365/0634 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →