IP Library Granted Patent US 7,212,240
Granted Patent B1
US 7,212,240 · App. 10/143,881 · Granted May 1, 2007

Imager with a row of photodiodes or pinned photo diodes

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,212,240
App. No.
10/143,881
Granted
May 1, 2007
Kind
B1
Abstract

A TDI sensor includes a first readout register and a plurality of sensor columns. The first readout register includes a plurality of first readout register elements. A first sensor column includes a photogate and a diode photodetector at an end. The diode photodetector is either a photodiode or a pinned photodiode. The photogate is coupled through the diode photodetector and from there through a transfer gate to a corresponding readout register element.

Claims (49)

1. A TDI sensor comprising a first readout register and a plurality of sensor columns, wherein:

the first readout register includes a plurality of first readout register elements;

a first sensor column includes a first photogate and a first diode photodetector at a first end, the first diode photodetector being one of a first photodiode and a first pinned photodiode; and

the first photogate is coupled through the first diode photodetector and from there through a first transfer gate to a corresponding first readout register element.

2. The sensor of claim 1 , wherein the first diode photodetector is a full aperture photodetector.

3. The sensor of claim 2 , wherein:

the first sensor column includes a plurality of photogates;

the first photogate constitutes one of the plurality of photogates of the first sensor column; and

the plurality of photogates constitute a stage selectable register.

4. The sensor of claim 1 , wherein:

the first sensor column includes a plurality of photogates;

the first photogate constitutes one of the plurality of photogates of the first sensor column; and

the plurality of photogates constitute a stage selectable register.

5. The sensor of claim 1 further comprising a second readout register that includes a plurality of second readout register elements, wherein:

the first sensor column further includes a second photogate and a second diode photodetector at a second end, the second diode photodetector being one of a second photodiode and a second pinned photodiode; and

the second photogate is coupled through the second diode photodetector and from there through a second transfer gate to a corresponding second readout register element.

6. The sensor of claim 5 , wherein the first and second diode photodetectors are full aperture photodetectors.

7. The sensor of claim 6 , wherein:

the first sensor column includes a plurality of photogates;

the first and second photogates constitute photogates of the plurality of photogates of the first sensor column; and

the plurality of photogates constitute a stage selectable register.

8. The sensor of claim 5 , wherein:

the first sensor column includes a plurality of photogates;

the first and second photogates constitute photogates of the plurality of photogates of the first sensor column; and

the plurality of photogates constitute a stage selectable register.

9. A method comprising steps of:

accumulating a first photocharge in a photogate;

transferring the first photocharge from the photogate to a photodiode;

accumulating a second photocharge in the photodiode; and

transferring both the first and second photocharge from the photodiode to a readout register cell.

10. The method of claim 9 , further comprising steps of:

accumulating a third photocharge in the photogate while the step of accumulating a second photocharge accumulates the second photocharge in the photodiode; and

transferring the third photocharge from the photogate to the photodiode while the step of transferring both the first and second photocharge transfers both the first and second photocharge from the photodiode to the readout register cell.

11. The method of claim 9 , further comprising a step of:

scanning a portion of an image conjugate of a scene to be imaged from the photogate to photodiode in the span of a first time interval, wherein

the first time interval is substantially equal to a time interval between when the step of transferring the first photocharge transfers the first photocharge from the photogate to a photodiode and when the step of transferring both the first and second photocharge transfers both the first and second photocharge from the photodiode to the readout register cell.

12. A method comprising steps of:

transferring accumulated signal charge from a TDI column into a full aperture photodetector, the full aperture photodetector being one of a photodiode and a pinned photodiode;

accumulating additional photocharge in the full aperture photodetector; and

transferring the accumulated signal charge and the additional photocharge from the full aperture photodetector to a readout register.

13. A method according to claim 12 , wherein the readout register is a CCD readout register.

14. A method according to claim 13 , wherein the transferring of the accumulated signal charge from the TDI column includes transferring the accumulated signal charge from a photogate to the full aperture photodetector.

15. A method according to claim 13 , wherein the transferring of the accumulated signal charge from the TDI column includes transferring the accumulated signal charge from a reticulated photogate to the full aperture photodetector.

16. A method according to claim 13 , wherein the transferring of the accumulated signal charge and the additional photocharge includes:

applying a transfer pulse to a transfer clock line; and

applying a transfer pulse to a register clock line of the CCD readout register.

17. A method according to claim 13 , wherein the transferring of the accumulated signal charge and the additional photocharge includes:

applying a first transfer pulse to a transfer clock line for a first predetermined time; and

applying a second transfer pulse to a register clock line of the CCD readout register for a time period beginning when the first transfer pulse is applied to the transfer clock line and ending a second predetermined time after the first transfer pulse is no longer applied to the transfer clock line.

Assignments (2)
MERGER Recorded Jan 4, 2019
From: TELEDYNE DALSA, INC.
To: TELEDYNE DIGITAL IMAGING, INC.
Reel/Frame 047908/0135 →
MERGER Recorded Mar 14, 2012
From: DALSA, INC.
To: TELEDYNE DALSA, INC.
Reel/Frame 027865/0605 →