Arrangement for time-correct combination of two data streams
View Patent ↗Methods and apparatus are described for time-correct combination of two data streams, particularly video data streams. In this case, a sync signal of the first video data stream is a horizontal sync signal. In this case, methods and apparatus are provided to combine the two video data streams in a pixel-precise manner, even though time base error, i.e. discontinuities occur in the second video data stream.
1. An arrangement for time-correct combination of a first, continuous digital data stream (V 1 ), comprising a sync signal (S), with a second, discontinuous digital data stream (V 2 ), the arrangement comprising:
a first delay member ( 2 ) delaying the first data stream (V 1 ) by a first predetermined period of time,
a second delay member ( 3 ) delaying the sync signal (S) of the first data stream (V 1 ) by a second predetermined period of time,
a memory ( 4 ) in which the second data stream (V 2 ) is written in accordance with a write pointer (WP) and from which it is read in accordance with a read pointer (RP), the write pointer (WP) being reset by each pulse of the undelayed sync signal (S; WPR) of the first data stream (V 1 ), and the read pointer (RP) being reset by each pulse (RPR) of the sync signal of the first data stream (V 1 ) delayed by means of the second delay member ( 3 ), i.e. set at the start of the memory ( 4 ), and
means ( 6 ) for combining or processing the output data streams of the first delay member ( 2 ) and the memory ( 4 ),
wherein the first period of time is chosen to be such that the output data streams of the first delay member ( 2 ) and the memory ( 4 ) occur at the means ( 6 ) for combining or processing in a desired temporal relation to each other, and wherein the second period of time is chosen to be such that the read pointer (RP) does not catch up with the write pointer (WP) during the process of reading from the memory ( 4 ), also when taking the discontinuities occurring in the second data stream (V 2 ) into account.
2. An arrangement as claimed in claim 1 , characterized in that the data streams (V 1 , V 2 ) are video data streams, the first of which comprises a horizontal sync signal as a synchronizing signal (S).
3. An arrangement as claimed in claim 1 , characterized in that a line memory is provided as memory ( 4 ), which is capable of storing the data of a picture line of the second video data stream (V 2 ).
4. An arrangement as claimed in claim 1 , characterized in that the second video data stream (V 2 ) comes from an external SDRAM ( 5 ) and the discontinuities of this data stream are produced by the process of reading from this SDRAM ( 5 ).
5. An arrangement as claimed in claim 1 , characterized in that the means ( 6 ) for combining or processing the output data streams of the first delay member ( 2 ) and the memory ( 4 ) serve for a noise reduction of the first or the second video data stream (V 1 ; V 2 ).
6. An arrangement as claimed in claim 1 , characterized in that the means ( 6 ) for combining or processing the output data streams of the first delay member ( 2 ) and the memory ( 4 ) are used to combine one of the video data streams (V 1 ; V 2 ) with the other video data stream (V 1 ; V 2 ) in such a way that a picture-in-picture function is realized.