Debugging system for semiconductor integrated circuit
View Patent ↗A plurality of semiconductor integrated circuits have the same configuration as that of an LSI which is subjected to debugging. Different internal signals are respectively collected from the semiconductor integrated circuits under the same operation conditions. The operation of the LSI is analyzed based on the collected internal signals. By doing this, it is not necessary to add output terminals to the LSI or switch the internal signals output from output terminals at periodic time intervals. This facilitates the debugging of the entire LSI in a low-cost and simple configuration.
1. A system for debugging a designated semiconductor integrated circuit, comprising:
a board having a plurality of debugging semiconductor integrated circuits, each of the debugging semiconductor integrated circuits having the same configuration as that of the designated semiconductor integrated circuit; and
analyzing means for collecting different internal signals from the respective debugging semiconductor integrated circuits while the debugging semiconductor integrated circuits are under the same operation condition as the designated semiconductor integrated circuit, and for analyzing the operation of the designated semiconductor integrated circuit based on the collected internal signals.
2. The debugging system according to claim 1 , wherein the designated semiconductor integrated circuit has selective output terminals for selectively outputting internal signals of the designated semiconductor integrated circuit in accordance with signal patterns input by the analyzing means.
3. The debugging system according claim 2 , wherein the designated semiconductor integrated circuit has output terminals other than the selective output terminals which output the internal signals only when a predetermined signal pattern is input by the analyzing means.
4. The debugging system according to claim 3 , wherein the output terminals of the designated semiconductor integrated circuit are connected to corresponding output terminals of the debugging semiconductor integrated circuits, and the predetermined signal pattern is input into at least one of the debugging semiconductor integrated circuits.
5. A method of debugging a designated semiconductor integrated circuit, comprising:
inputting signal patterns to specify internal signals to be collected into a plurality of debugging semiconductor integrated circuits, each of the debugging semiconductor integrated circuits having the same configuration as that of the designated semiconductor integrated circuit;
collecting the internal signals in response to the signal patterns from predetermined output terminals of the respective debugging semiconductor integrated circuits while the debugging semiconductor integrated circuits are under the same operation condition as the designated semiconductor integrated circuit; and
analyzing the operation of the designated semiconductor integrated circuit based on the collected internal signals.
6. The debugging method as claimed in claim 5 , further comprising:
connecting output terminals of the respective debugging semiconductor integrated circuits, other than the predetermined output terminals, with corresponding output terminals of the designated semiconductor integrated circuit; and
inhibiting at least one of the debugging semiconductor integrated circuits from outputting internal signals from the output terminals other than the predetermined output terminals.
7. A system for debugging a designated semiconductor integrated circuit, comprising:
a processor for executing instructions; and
instructions, the instructions including:
inputting signal patterns to specify internal signals to be collected into a plurality of debugging semiconductor integrated circuits, each of the debugging semiconductor integrated circuits having the same configuration as that of the designated semiconductor integrated circuit;
collecting the internal signals in response to the signal patterns from predetermined output terminals of the respective debugging semiconductor integrated circuits while the debugging semiconductor integrated circuits are under the same operation condition as the designated semiconductor integrated circuit; and
analyzing the operation of the designated semiconductor integrated circuit based on the collected internal signals.
8. A computer-readable recording medium having recorded thereon a program to be executed on a computer for debugging a designated semiconductor integrated circuit, the program comprising:
inputting signal patterns to specify internal signals to be collected into a plurality of debugging semiconductor integrated circuits, each of the debugging semiconductor integrated circuits having the same configuration as that of the designated semiconductor integrated circuit;
collecting the internal signals in response to the signal patterns from predetermined output terminals of the respective debugging semiconductor integrated circuits while the debugging semiconductor integrated circuits are under the same operation condition as the designated semiconductor integrated circuit; and
analyzing the operation of the designated semiconductor integrated circuit based on the collected internal signals.
9. The computer-readable recording medium according to claim 8 , wherein the program further comprises:
connecting output terminals of the respective debugging semiconductor integrated circuits, other than the predetermined output terminals, with corresponding output terminals of the designated semiconductor integrated circuit; and
inhibiting at least one of the debugging semiconductor integrated circuits from outputting internal signals from the output terminals other than the predetermined output terminals.
10. A system for debugging a designated semiconductor integrated circuit, comprising:
a board having a plurality of debugging semiconductor integrated circuits, each of the debugging semiconductor integrated circuits having the same configuration as that of the designated semiconductor integrated circuit; and
an analyzing unit for collecting different internal signals from the respective debugging semiconductor integrated circuits while the debugging semiconductor integrated circuits are under the same operation condition as the designated semiconductor integrated circuit, and for analyzing the operation of the designated semiconductor integrated circuit based on the collected internal signals.