IP Library Granted Patent US 6,933,568
Granted Patent B2
US 6,933,568 · App. 10/150,482 · Granted Aug 23, 2005

Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,933,568
App. No.
10/150,482
Granted
Aug 23, 2005
Kind
B2
Abstract

The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of lowdielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Claims (25)

1. A thin film transistor substrate for a liquid display comprising:

an insulating substrate;

gate formed on the substrate and comprising a gate line, a gate electrode, and a gate pad;

a gate insulating film formed on the gate wiring and having contact openings for exposing at least the gate pad;

a semiconductor pattern formed on the gate insulating film;

a contact layer pattern formed on the semiconductor layer pattern;

data wiring formed on the contact layer pattern, the data wiring having substantially the same shape as the contact layer pattern and comprising a source electrode, a drain electrode, a data line, and a data pad;

a protection film pattern formed on the data wiring, the protection film pattern having contact openings for exposing the gate pad, the data pad, and the drain electrode, and comprised of a low dielectric insulating film;

a transparent electrode layer pattern electrically connected with the exposed gate pad, data pad, and drain electrode,

a maintenance capacity line formed on the same layer as the gate wiring on the insulating substrate;

a maintenance capacitor semiconductor pattern overlapping the maintenance capacity line and formed on the same layer as the semiconductor pattern;

a maintenance capacitor contact layer pattern formed n the maintenance capacitor semiconductor pattern and having the same area and shape as the maintenance capacitor semiconductor pattern; and

a maintenance capacitor conductor pattern formed on the maintenance capacitor contact layer pattern and having the same area and shape as the maintenance capacitor semiconductor pattern,

wherein the maintenance capacitor conductor pattern is connected with a part of the transparent electrode pattern, wherein the low dielectric insulating film is an a-SiCOH thin film vapor deposited by a CVD or PECVD method by adding a reactant gas mixture comprising main source gas, silane (SiH 4 ), and an oxidant on the data wiring.

2. The thin film transistor substrate according to claim 1 , wherein the ratio of the silane (SiH 4 ) gas to main source gas is 1:0.5 to 1.

3. The thin film transistor substrate according to claim 1 , wherein the main source gas is selected as one or more from the group consisting of organosilicon compounds represented by the following Chemical Formulae 1, 2 and 3:

SiH x (CH 3 ) 4-x   [Chemical Formula 1]

wherein, x is an integer, that is, 0, 1, 2 or 4,

Si(OR 1 ) x R 2 4-x   [Chemical Formula 2]

wherein, R 1 and R 2 are independently or simultaneously straight or branched C1-10 alkyl or alkenyl group substituted or unsubstituted by C1-5 alkyl or alkenyl group, and preferably R 1 and R 2 are independently or simultaneously methyl, ethyl, propyl or vinyl group, and x is an integer from 0 to 4.

cyclic-(SiR 1 R 2 —O) n   [Chemical Formula 3]

wherein, R 1 and R 2 are independently or simultaneously hydrogen, straight or branched C1-10 alkyl or alkenyl group substituted or unsubstituted by C1-5 alkyl or alkenyl group, and preferably R 1 and R 2 are independently or simultaneously hydrogen, methyl, ethyl, propyl or vinyl group.

4. The thin film transistor substrate according to claim 1 , wherein the oxidant is selected from the group consisting of O 2 , N 2 O, NO, CO 2 , CO, ozone, and a mixture thereof.

5. The thin film transistor substrate according to claim 1 , wherein the low dielectric insulating film is vapor deposited by a PECVD method by exposing a reactant gas mixture to a plasma at a power density of 0.2 to 1.5 mW/cm 2 , under a pressure of 1 to 10,000 Torr, and at a temperature of 25 to 300° C.

6. The thin film transistor substrate according to claim 1 , wherein the low dielectric insulating film has a dielectric constant of 2 to 3.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029045/0860 →