Method of interleaving/deinterleaving in a communication system
View Patent ↗A method of performing interleaving or deinterleaving in a communication system having at least one interleaver at the transmitter and at least one deinterleaver at the receiver. The method includes interleaving or deinterleaving the input bit sequence x n as follows: y n =x π n , n=0, . . . , N−1, using a bridge function between π n and n, n=0, . . . , N−1, based on a spline linear model. When the system includes a first and a second interleaving or deinterleaving, the method is performed for both. When the second interleaving or deinterleaving includes adding padding bits, the location in the interleaved or deinterleaved bit sequence of the padding bits is determined and interleaving or deinterleaving for the determined locations is skipped.
1. A method of performing interleaving or deinterleaving in a communication system having at least one interleaver at the transmitter and at least one deinterleaver at the receiver, the method being performed in software by the interleaver or in the transmitter deinterleaver in the receiver and comprising:
receiving by the interleaver or deinterleaver an input bit sequence X n ;
interleaving or deinterleaving the input bit sequence X n as follows: y n =x π n ,n=0, . . . ,N −1, using a bridge function between π n and n, n=0, . . . ,N−1, based on a spline linear model without forming a matrix of the bit sequence for permutation interleaving or deinterleaving; and
outputting from the interleaver or deinterleaver the interleaved or deinterleaved bit sequence.
2. The method of claim 1 , wherein the bridge function is
π
n
r
j
=
C
×
n
-
j
×
N
+
P
C
(
j
)
,
j=0,1, . . . ,C−1, where P C (j) is the permutation pattern and r j denote the sets of discrete time intervals, and the interleaving or deinterleaving is
y
n
r
j
=
x
C
×
n
-
j
×
N
+
P
C
(
j
)
,
n
∈
r
j
.
3. The method of claim 1 , wherein the system includes a first and a second interleaving or deinterleaving and the method is performed for both.
4. The method of claim 3 , wherein the second interleaving or deinterleaving includes:
adding padding bits;
determining the location in an interleaved or deinterleaved bit sequence of the padding bits; and
skip interleaving or deinterleaving for the determined locations.
5. The method of claim 4 , wherein y has an index m, and x has an index n; and the index m is not increased, and the index n is increased for determined locations of padding.
6. The method of claim 1 , wherein the interleaving or deinterleaving includes:
adding padding bits;
determining the location in an interleaved or deinterleaved bit sequence of the padding bits; and
skip interleaving or deinterleaving for the determined locations.
7. The method of claim 6 , wherein y has an index m, and x has an index n; and the index m is not increased, and the index n is increased for determined locations of padding.
8. An apparatus including an interleaver or deinterleaver performing the method of claim 1 .