IP Library Granted Patent US 6,909,174
Granted Patent B2
US 6,909,174 · App. 10/177,806 · Granted Jun 21, 2005

Reference plane of integrated circuit packages

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Quick Facts
Patent No.
US 6,909,174
App. No.
10/177,806
Granted
Jun 21, 2005
Kind
B2
Abstract

An apparatus including an integrated circuit including a plurality of devices and signal circuitry coupled to the plurality of devices, and a package substrate including a first surface coupled to the integrated circuit, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

Claims (22)

1. An apparatus comprising:

a package substrate comprising a first surface coupled to an integrated circuit having signal circuitry, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

2. The apparatus of claim 1 , wherein the reference signal is a power signal.

3. The apparatus of claim 1 , further comprising conductive traces coupled to the contact points comprising a dimension extending over the second surface of the package substrate.

4. The apparatus of claim 1 , further comprising an externally accessible reference signal line disposed between the integrated circuit and the second surface.

5. An apparatus comprising:

a module comprising at least one package configured for electrically coupling to a bus on a system board, the at least one package comprising:

a package substrate comprising a first surface coupled to an integrated circuit having signal circuitry, a second surface having a plurality of externally accessible contact points coupled to the signal circuitry and the module, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the second surface and electrically isolated from the contact points.

6. The apparatus of claim 5 , wherein the reference signal is a power signal.

7. The apparatus of claim 5 , further comprising conductive traces coupled to the contact points comprising a dimension extending over the second surface of the package substrate.

8. The apparatus of claim 6 , wherein the module comprises a plurality of memory packages arranged in a serially addressable configuration.

9. The apparatus of claim 5 , wherein the package further comprises an externally accessible reference signal line disposed between the integrated circuit and the second surface.

10. An apparatus comprising:

a module comprising at least one package electrically coupled to and addressable through a control circuit of a system board, the at least one package comprising:

an integrated circuit comprising a plurality of devices; and

a package substrate comprising a surface having a plurality of externally accessible contact points coupled to the devices and the module, and a continuous layer of conductive material coupled to a reference signal of the integrated circuit and disposed over an area of the surface and electrically isolated from the contact points.

11. The apparatus of claim 10 , wherein the reference signal is a power signal.

12. The apparatus of claim 10 , further comprising conductive traces coupled to the contact points comprising a dimension extending over the surface of the package substrate.

13. The apparatus of claim 10 , the plurality of devices of the integrated circuit comprise a plurality of memory devices.

14. The apparatus of claim 13 , wherein the module comprises a plurality of memory packages arranged in a serially addressable configuration.

15. The apparatus of claim 10 , wherein the package further comprises an externally accessible reference signal line disposed between the integrated circuit and the second surface.

16. The apparatus of claim 15 , wherein the reference signal line is coupled to a ground.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Jul 12, 2022
From: VENTURE LENDING & LEASING IX, INC.; WTI FUND X, INC.
To: PARALLEL WIRELESS, INC.
Reel/Frame 060900/0022 →
RELEASE OF SECURITY INTEREST Recorded Jul 8, 2022
From: VENTURE LENDING & LEASING IX, INC.; VENTURE LENDING & LEASING VIII, INC.
To: PARALLEL WIRELESS, INC.
Reel/Frame 060828/0394 →