IP Library Granted Patent US 6,954,384
Granted Patent B2
US 6,954,384 · App. 10/188,804 · Granted Oct 11, 2005

Semiconductor device

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Quick Facts
Patent No.
US 6,954,384
App. No.
10/188,804
Granted
Oct 11, 2005
Kind
B2
Abstract

In a semiconductor device having a data input buffer capable of inputting write data to each of memory units, the data input buffer is changed from an inactive state to an active state after the reception of instruction for a write operation effected on the memory unit. The data input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by the turning on of a power switch to thereby cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, the data input buffer is rendered inactive in advance, before the instruction for the write operation is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.

Claims (47)

1. A semiconductor device which activates in accordance with a command, comprising:

a data terminal receiving data;

an input buffer having a differential amplifier coupled to said data terminal; and

a plurality of memory cells, each of which is necessary to refresh,

wherein, in a time period from a write command issuing to a next command issuing, said differential amplifier is changed from an active state to an inactive state so that a power consumption of said differential amplifier is reduced.

2. A semiconductor device according to claim 1 ,

wherein, in the time period from said write command issuing to said next command issuing, said differential amplifier is changed from said active state to said inactive state, after write data are written to the memory cells.

3. A semiconductor device according to claim 1 ,

wherein, in the time period from said write command issuing to said next command issuing, said differential amplifier is changed from said active state to said inactive state after a predetermined number of cycles have passed from issuing of said write command.

4. A semiconductor device which activates in accordance with a command, comprising:

a data terminal receiving data;

an input buffer having a differential amplifier coupled to said data terminal; and

a plurality of memory cells, each of which is necessary to refresh,

wherein after a predetermined number of cycles have passed from issuing of a write command, said differential amplifier is changed from an active state to an inactive state, so that a power consumption of said differential amplifier is reduced.

5. A semiconductor device which activates in accordance with a command, comprising:

a data terminal receiving data;

an input buffer having a differential amplifier coupled to said data terminal; and

a plurality of memory cells, each of which is necessary to refresh,

wherein, after a predetermined number of cycles have passed from issuing of a write command, said differential amplifier is changed from a first state to a second state,

wherein a through current of said differential amplifier in said first state is larger than a through current of said differential amplifier in said second state.

6. A semiconductor device which activates in accordance with a command, comprising:

a data terminal receiving data;

an input buffer having a differential amplifier coupled to said data terminal; and

a plurality of memory cells, each of which is necessary to refresh,

wherein, in a time period from a write command issuing to a next command issuing, after predetermined cycles are passed from said write command issuing, said differential amplifier is changed from a first state to a second state,

wherein a through current of said differential amplifier in said first state is larger than a through current of said differential amplifier in said second state.

7. A semiconductor device which activates in accordance with a command, comprising:

a data terminal receiving data;

an input buffer having a differential amplifier coupled to said data terminal; and

a plurality of memory cells, each of which is necessary to refresh,

wherein, in a time period from a write command issuing to a next command issuing, after write data are written to the memory cells, said differential amplifier is changed from a first state to a second state,

wherein a through current of said differential amplifier in said first state is larger than a through current of said differential amplifier in said second state.

8. A semiconductor device which activates in accordance with a command, comprising:

a terminal receiving a signal;

an input buffer having a differential amplifier coupled to said terminal; and

a plurality of memory cells,

wherein, during an active operation mode, in a time period from a first command issuing to a next second command issuing, said differential amplifier is changed from a first state to a second state,

wherein a through current of said differential amplifier in said first state is larger than a through current of said differential amplifier in said second state.

9. A semiconductor device according to claim 8 , wherein each of said plurality of memory cells is necessary to be refreshed.

10. A semiconductor device which activates in accordance with a command, comprising:

a terminal receiving a signal;

an input buffer having a differential amplifier coupled to said terminal; and

a plurality of memory cells,

wherein, in a time period from a first command issuing to a next second command issuing, said differential amplifier is changed from a first state to a second state,

wherein a through current of said differential amplifier in said first state is larger than a through current of said differential amplifier in said second state,

wherein said first command is a write command, and

wherein, before said write command, an activate command is issued.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2015
From: HITACHI DEVICE ENGINEERING CO., LTD.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 035633/0157 →
MERGER Recorded May 13, 2015
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 035656/0044 →
CHANGE OF NAME Recorded May 13, 2015
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 035656/0121 →
CHANGE OF NAME Recorded Aug 13, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024864/0635 →
MERGER Recorded Aug 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0190 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2003
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 014190/0027 →