IP Library Granted Patent US 6,937,102
Granted Patent B2
US 6,937,102 · App. 10/208,636 · Granted Aug 30, 2005

Low bias current/temperature compensation current mirror for linear power amplifier

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Quick Facts
Patent No.
US 6,937,102
App. No.
10/208,636
Granted
Aug 30, 2005
Kind
B2
Abstract

A power amplifier circuit whose performance is optimized by operating its stages in substantially close to a Class B mode by reducing quiescent current during low driver signal levels. As the driver signal amplitude increases, the operation of the amplifier is configured to dynamically adjust to be in a Class AB mode, thereby increasing the power efficiency of the overall circuit at kiw drive levels. A further enhancement to the power amplifier circuit includes a temperature compensation circuit to adjust the bias of the amplifier so as to stabilize the performance in a wide temperature range.

Claims (41)

1. A dynamic bias adjustor, comprising:

a signal detector for determining the drive level of an amplifying device, and

a bias output circuit connected to said signal detector and configured to operate the amplifying device in a Class B mode or substantially close to a Class B mode during low drive level conditions, and in a Class AB mode during high drive level conditions.

2. The dynamic bias adjustor as in claim 1 , further comprising a temperature compensation circuit to stabilize the bias point of the amplifying device over a temperature range.

3. The dynamic bias adjustor as in claim 2 , wherein the temperature range is between −30° C. and +110° C.

4. The dynamic bias adjustor of claim 1 , wherein said amplifying device comprises

a pre-amplifier stage, a drive stage, and an output stage, and

wherein the signal detector is connected to the output of said drive stage.

5. The dynamic bias adjustor of claim 4 , wherein said dynamic bias adjustor biases at least one of said pre-amplifier stage, said drive stage, and said output stage to operate in a Class B mode or substantially close to a Class B mode, when the signal level detected by said signal detector is below a predetermined level.

6. The dynamic bias adjustor of claim 5 , wherein said dynamic bias adjustor biases at least one of said pre-amplifier stage, said drive stage, and said output stage to operate in a Class AB mode, when the signal level detected by said signal detector is above a predetermined level.

7. The dynamic bias adjustor of claim 1 , further comprising:

a differential amplifier, connected to said signal detector, and

a source follower, connected between said differential amplifier and an input of said amplifying device;

whereby said signal detector produces a signal that is proportional to the output of said amplifying device, said differential amplifier amplifies said signal, and the output of said source follower adjusts the operating point of said amplifying device according to the amplified signal.

8. The dynamic bias adjustor of claim 2 , wherein said temperature compensation circuit comprises:

a transistor having a control input and two outputs, wherein one of said outputs is connected to ground and the other is connected to said bias adjustment circuit; and

at least one solid-state element having an impedance that varies according to its temperature, connected at one end to the control input of said transistor and at another end to ground;

a reference resistor connected at one end to the junction of the solid-state element and the control input of said transistor and capable of receiving at another end a negative supply voltage;

wherein said transistor outputs a temperature-dependent signal to said dynamic bias adjustment circuit that is proportional to the temperature of said solid-state element, and said dynamic bias adjustment circuit alters the operating point of said amplifying device to compensate for changes in the temperature-dependent signal output from said transistor.

9. A method of designing an efficiently biased amplifying circuit comprising a pre-amplifier stage, a driver stage and an output stage, the method comprising the steps of:

providing a dynamic bias adjuster for detecting an alternating current voltage and generating a direct current output voltage having a value proportional to the alternating current voltage peak level;

connecting the dynamic bias adjuster to the driver output voltage; and

connecting the output voltage of the dynamic bias adjustor to bias the stages of the amplifying circuit whereby at least one of the stages of the amplifying circuit operates in a Class B mode or substantially close to a Class B when the driver output is at or below a predetermined level.

10. The method of claim 9 , whereby at least one of the stages of the amplifying circuit operates in a Class AB mode when the driver output is at or above a predetermined level.

11. The method of claim 9 , further comprising the step of adding a temperature stabilizing circuit which adjusts the bias point of at least one of the stages to account for changes in temperature.

12. A method of implementing a biasing scheme for an amplifying device, comprising the steps of:

monitoring a signal level at an output of the amplifying device;

producing a first signal proportional to the signal level; and

dynamically biasing, as a function of the first signal, the amplifying device to operate in a Class B mode or substantially close to a Class B mode when the signal level is low, and in a Class AB mode when the signal is high.

13. The method of claim 12 , further comprising the steps of:

producing a second signal proportional to the temperature of the amplifying device; and

dynamically biasing, as a function of the second signal, the amplifying device so that its operating point is substantially stable over a temperature range.

14. The method of claim 13 , wherein the temperature range is between −30° C. and +110° C.

15. The method of claim 12 , further comprising the steps of:

amplifying the first signal,

level-shifting the first signal, and

using the level-shifted signal to alter the operating point of the amplifying device.

16. The method of claim 13 , wherein the steps of producing a second signal comprises the steps of:

establishing a current-flow through a solid-state element having an impedance that varies according to its temperature, thereby creating a temperature-dependent voltage signal;

applying the temperature-dependent voltage signal to a transistor, whereby the output signal of the transistor also varies according to temperature; and

level-shifting the second signal.

Assignments (9)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 24, 2017
From: II-VI OPTOELECTRONIC DEVICES, INC.
To: SKYWORKS SOLUTIONS, INC.
Reel/Frame 042551/0708 →
CHANGE OF NAME Recorded May 1, 2017
From: ANADIGICS, INC.
To: II-VI OPTOELECTRONIC DEVICES, INC.
Reel/Frame 042381/0761 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS NUMBER 6790900 AND REPLACE IT WITH 6760900 PREVIOUSLY RECORDED ON REEL 034056 FRAME 0641. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded Nov 21, 2016
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 040660/0967 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S NAME PREVIOUSLY RECORDED AT REEL: 037973 FRAME: 0226. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT. Recorded May 18, 2016
From: ANADIGICS, INC.
To: II-VI INCORPORATED
Reel/Frame 038744/0835 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2016
From: II-VI INCORPORATED
To: ANADIGICS, INC.
Reel/Frame 038119/0312 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Mar 1, 2016
From: ANADIGICS, INC.
To: II-IV INCORPORATED
Reel/Frame 037973/0226 →
RELEASE OF SECURITY INTEREST Recorded Mar 1, 2016
From: SILICON VALLEY BANK
To: ANADIGICS, INC.
Reel/Frame 037973/0133 →
SECURITY AGREEMENT Recorded Oct 27, 2014
From: ANADIGICS, INC.
To: SILICON VALLEY BANK
Reel/Frame 034056/0641 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2014
From: LOPEZ, OSVALDO J.; BAYRUNS, ROBERT; SINGH, MAHENDRA
To: ANADIGICS, INC.
Reel/Frame 033987/0750 →