Granted Patent B2

US 7,043,729 · App. 10/214,909 · Granted May 9, 2006

Abstract

Claims (126)

1. A system having reduced system management interrupt (SMI) latency while pullng in system management mode, comprising: a central processing unit (CPU) coupled to a memory and comprising a system clock, a SMI handler, a flags register, a delay queue for storing a list of delay threads and a list of delayed threads, a suspended queue for storing a list of suspended threads, a ready queue for storing a list of threads ready for execution, and a stack, which CPU is capable of responding to a system management interrupt and, at this time, changing its execution location to a previously defined location;

a software SMI generator for generating software SMI's;

hardware SMI generator for generating SMI at predetermined intervals;

thread detector for detecting the source of the SMI;

an elapsed time detector for reading the system clock to determine the amount of elapsed time since the last time the system clock was read;

a thread generator for creating different execution threads that include at least the current execution location, their own general purpose registers and their own stack and for creating, suspending, resuming and destroying execution threads;

a thread delay generator for delaying a thread for at least a predetermined period of time, and for delaying a thread for at most the predetermined period of time;

an SMI source detector for detecting a source of the SMI an for creating an appropriate thread to handle the SMI, and for detecting whether the CPU entered the SMI handler using a software SMI;

an idle thread that runs at a lowest thread priority, and which exits the SMI handler to either schedule a recurring SMI or modify the saved flags register of the CPU;

normal-node code for using the software SMI generator to create an SMI thread that executes at a specified address, with the specified contents in the general-purpose registers;

a thread transfer mechanism by which threads in the delay queue are moved into the ready queue so that they are ready for execution; and software code comprising:

a code segment that generates a system management interrupt;

a code segment that saves the state of the CPU;

a code segment that creates an idle thread derived from the saved state;

a code segment that exits system management mode during a time period prior to a hardware polling event;

a code segment that services pending lower-priority interrupts during the time period prior to the hardware polling event;

a code segment that re-enters system management mode once the lower priority interrupts are serviced; and

a code segment that resumes polling.

2. The system recited in claim 1 wherein the code segments that exits system management mode and services pending lower-priority interrupts comprise:

a code segment that creates a thread for each detected SMI event handler;

a code segment that determines if there are any threads in a delay queue;

a code segment that, if there are no threads in the delay queue, restores the state of the CPU and exits the SMI;

a code segment that, if there are threads in the delay queue, determines if a CPU has generated a software SMI;

a code segment that, if a software SMI has been generated, sets an indicator in the save state of the CPU, and sets a first interval value to a maximum interval;

a code segment that, if there are no threads in the delay queue, sets the first interval value of the smallest delay in the delay queue;

a code segment that sets a second interval value to the smallest delay in the delay queue; and

a code segment that sets a periodic SMI to the minimum of the first and second interval values.

3. The system recited in claim 1 wherein the software code comprises code segments that:

generate a software SMI thread;

read the software SMI thread type from hardware that generated it;

determine if the software SMI thread is a create thread;

if the software SMI thread is a create thread, create a thread having parameters copied from a normal mode stack and exit the thread;

if the software SMI thread is not a create thread, determine if it is a resume thread;

if the software SMI thread is a resume thread, move threads form the delay queue to the ready queue; and

if the software SMI thread is not a resume thread, exit the software SMI thread.

4. The system recited in claim 1 wherein the software code comprises code segments that:

generate a periodic SMI thread;

set an interval value to a current periodic SMI interval;

while the delay of the first entry in the delay queue is greater than or equal to the interval value, move the first entry in the delay queue to the ready queue;

move all entries from the delay queue into the ready queue; and

exit the periodic SMI thread.

5. The system recited in claim 1 wherein the software code comprises code segments that:

execute the normal mode code;

push create thread parameters onto the stack;

clear an indicator whether a resume thread software SMI should be generated;

general a create thread software SMI;

determine if the indicator is set;

if the indicator is not set, generate a resume thread software SMI and request the test for the set indicator until it is set; and

if the in indicator is set, exit the normal mode code.

6. A method, for use in a system comprising a central processing unit (CPU), for reducing system management interrupt (SMI) latency while polling in system management mode, comprising the steps of:

generating a system management interrupt;

saving the state of the CPU;

creating an idle thread derived from the saved state;

exiting system management mode during a time period prior to a hardware polling event;

servicing pending lower-priority interrupts during the time period prior to the hardware polling event;

re-entering system management mode once the lower-priority interrupts are serviced; and

resuming polling.

7. The method recited in claim 6 wherein the steps of exiting system management mode and servicing pending lower-priority interrupts comprises the steps of:

creating a thread for each detected SMI event handler;

deterinting if there are any threads in a delay queue;

if there it no threads in the delay queue, restoring the state of the CPU and exit the SMI;

if there are threads in the delay queue, determining if a CPU has generated a software SMI;

if a software SMI has been generated, setting an indicator in the save state of the CPU, and setting a first interval value to a maximum interval;

if there are no threads in the delay queue, setting the first interval value to the smallest delay in a delay queue;

setting a second interval value to the smallest delay in a delay queue; and

setting a periodic SMI to the minimun of the first and second interval values.

8. The method recited in claim 6 which comprises:

generating a software SMI thread;

reading the software SMI thread type from hardware that generated it;

determining if the software SMI thread is a create thread;

if the software SMI thread is a create thread, creating a thread having parameters copied from a normal mode stack and exiting the thread;

if the software SMI thread is not a create thread, determining if it is a resume thread;

if the software SMI thread is a resume thread, moving threads from the delay queue to the ready queue; and

if the software SMI thread is not a resume thread, exiting the software SMI thread.

9. The method recited in claim 6 which comprises:

generating a periodic SMI thread;

setting an interval value to a current periodic SMI interval;

while the delay of the first entry in the delay queue is greater than or equal to the interval value, moving the first entry in the delay queue to the ready queue;

moving all entries from the delay queue into the ready queue; and

exiting the periodic SMI thread.

10. The method recited in claim 6 which comprises:

executing the normal mode code;

pushing create thread parameters onto the stack;

clearing an indicator that indicates whether a resume thread software SMI should be generated;

generating a create thread software SMI;

determinating if the indicator is set;

if the indicator is not set, generating a resume thread software SMI and repeating the text for the set indicator until it is set; and

if the indicator is set, exiting the normal mode code.

11. A computer program stored in a computer readable medium for reducing system management interrupt (SMI) latency while polling in system management in mode, comprising:

a code segment that generates a system management interrupt;

a code segment that saves the CPU state;

a code segment that creates an idle thread derived from the saved state;

a code segment that exits system management mode during a timer period prior to a hardware event for which the code is waiting;

a code segment that services pending lower-priority interrupts during the time period prior to the hardware polling event;

a code segment that re-enters system management mode once the lower-priority interrupts are serviced; and

a code segment that resumes polling.

12. The code segments of claim 11 that exits system management made and services pending lower-priority interrupts comprise:

a code segment that creates a thread for each detected SMI event handler;

a code segment that determines if there are any threads in a delay queue;

a code sergment that, if there are no threads in the delay queue, restores the state of the CPU and exit the SMI;

a code segment that, if there are threads in the delay queue, determines if a CPU has generated a software SMI;

a code segment that, if a software SMI has been generated, sets an indicator in the save state of the CPU, and sets a first interval value to a maximum interval;

a code segment that, if there are no threads in the delay queue, sets a first interval value to the smallest delay in a delay queue;

a code segment that sets a second interval value to the smallest delay in the delay queue; and

a code segment that sets a periodic SMI to the minimum of the first and second interval values.

13. The computer program stored in a computer readable medium recited in claim 11 , further including code segments that:

generae a software thread;

read the software SMI Thread type from hardware that generated it;

derermine if the software SMI thread is a create thread;

if the software SMI tread is a create thread, create a tread having parameters copied from a normal mode stack and exit the thread;

if the software SMI thread is not a create thread, determine if it is a resume thread;

if the software SMI thread is a resume thread, move threads from the delay queue to the ready queue; and

if the software SMI thread is not a resume thread, exit the software SMI thread.

14. The computer program stored in a computer readable medium recited in claim 11 , further including code segments that:

generatt a periodic SMI thread;

set an interval value to a current periodic SMI interval;

while the delay of the first entry in the delay queue is greater than or equal to the interval value, move the first entry in the delay queue to the ready queue;

move all entries from the delay queue into the ready queue; and exit the periodic SMI thread.

15. The computer program stored in a computer readable medium recited in claim 11 , further including code segments that:

execute normal mode code;

push create thread parameters onto the stack;

clear an indication that indicates whether a resume thread software SMI should be generated;

generated a create thread software SMI;

determine if the indicator is set;

if the indicator is not set, generate a resume thread software SMI and repeat the test for the set indicator until it is set; and

if the indicator is set, exit the normal mode code.

Assignments (7)