Granted Patent
Utility
US 6,740,551
· Confirmation No. 6242
METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-02-27 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2004-02-27 | FRPR |
Certified Copy of Foreign Priority Application | 26 | View | |
| 2004-02-27 | LET. |
Miscellaneous Incoming Letter | 1 | View | |
| 2004-02-27 | DRW |
Drawings-only black and white line drawings | 1 | View | |
| 2003-05-28 | RETMAIL |
Mail returned to USPTO as undelivered | 12 | View | |
| 2002-09-06 | TRNA |
Transmittal of New Application | 3 | View | |
| 2002-09-06 | SPEC |
Specification | 22 | View | |
| 2002-09-06 | CLM |
Claims | 2 | View | |
| 2002-09-06 | ABST |
Abstract | 1 | View | |
| 2002-09-06 | DRW |
Drawings-only black and white line drawings | 7 | View |
Inventors
Yoshifumi Yoshida
Chiba-shi, JAPAN
Miwa Wake
Chiba-shi, JAPAN
Attorneys & Agents of Record
Classification
USPC
438/199
H10D84/85
H10P90/1906
H10W46/00
H10D86/201
H10D86/01
H10W46/501
H10W10/181
H10W10/012
H10W10/061
H10W10/13
Prosecution
- Examiner
- LATTIN, CHRISTOPHER W
- Art Unit
- 2812
- Docket No.
- S004-4806
- Confirmation No.
- 6242
Foreign Priority
2001-283201
·
2001-09-18
·
JAPAN
Publication
- Pub. No.
- US20030054594A1
- Pub. Date
- 2003-03-20
Patent Term Adjustment
-89days
No related applications found.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2016-03-10
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2004-02-27
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Quick Facts
- Patent No.
- US 6,740,551
- App. No.
- 10/236,391
- Filed
- 2002-09-06
- Granted
- 2004-05-25
- Pub. No.
- US20030054594A1
- Examiner
- LATTIN, CHRISTOPHER W
- Art Unit
- 2812
- PTA
- -89 days
External Links