High voltage integrated circuit including bipolar transistor within high voltage island area
View Patent ↗In a high voltage integrated circuit, a low voltage region is separated from a high voltage region by a junction termination. A bipolar transistor in the high voltage region is surrounded by an isolation region having a low doping concentration. The use of a low-doped isolation region increases the size of an active region without reduction of a breakdown voltage.
1. An integrated circuit comprising:
a substrate;
an epitaxial layer over the substrate, the epitaxial layer having a predetermined doping concentration;
a transistor formed in the epitaxial layer; and
an isolation region extending through the epitaxial layer such that a portion of the epitaxial layer in which the transistor is formed is electrically isolated from other portions of the epitaxial layer, the epitaxial layer having a conductivity type opposite that of the substrate and the isolation region, the isolation region having a lower doping concentration than the predetermined doping concentration of the epitaxial layer such that a depletion region formed as a result of a reverse biased junction between the epitaxial layer and the isolation region extends a farther distance into the entire isolation region and the substrate than into the epitaxial layer.
2. The integrated circuit of claim 1 further comprising a high voltage region separated from a low voltage region by a junction termination, wherein the transistor is formed in the high voltage region.
3. The integrated circuit of claim 1 wherein the transistor is a bipolar transistor.
4. The integrated circuit of claim 1 wherein the isolation region and the substrate are of p-type conductivity and the epitaxial layer is of n-type conductivity.
5. The integrated circuit of claim 1 wherein the isolation region comprises an upper region and a lower region, the lower region extending from an upper surface of the substrate to a middle portion of the epitaxial layer, and the upper region extending from the middle portion of the epitaxial layer to an upper surface of the epitaxial layer.
6. The integrated circuit of claim 5 wherein the upper region and the lower region are in electrical contact, and the upper region has a different doping concentration than the lower region.
7. The integrated circuit of claim 6 wherein the upper region has a lower doping concentration than the lower region.
8. A high voltage integrated circuit comprising:
a high voltage region separated from a low voltage region by a junction termination;
an epitaxial layer of n-type conductivity over a substrate of p-type conductivity, the epitaxial layer having a predetermined doping concentration;
a transistor formed in the epitaxial layer in the high voltage region; and
an isolation region of p-type conductivity extending through the epitaxial layer such that a portion of the epitaxial layer in which the transistor is formed is electrically isolated from other portions of the epitaxial layer, the isolation region having a lower doping concentration than the predetermined doping concentration of the epitaxial layer such that a depletion region formed as a result of a reverse biased junction between the epitaxial layer and the isolation region extends a farther distance into the entire isolation region than into the epitaxial layer.
9. The integrated circuit of claim 8 wherein the transistor is an npn bipolar transistor.
10. The integrated circuit of claim 8 wherein the isolation region comprises an upper region and a lower region, the lower region extending from an upper surface of the substrate to a middle portion of the epitaxial layer, and the upper region extending from the middle portion of the epitaxial layer to an upper surface of the epitaxial layer.
11. The integrated circuit of claim 10 wherein the upper region and the lower region are in electrical contact, and the upper region has a lower doping concentration than the lower region.