Method of insulating interconnects, and memory cell array with insulated interconnects
View Patent ↗The process is used to electrically insulate adjacent metallic interconnects made from an aluminum-containing alloy, in particular for interconnects which are arranged on a DRAM cell array. A dielectric material is applied to the interconnects and the polymerizable material polymerizes under the action of heat. In a heat-treatment step the dielectric material is polymerized. A step of applying the dielectric material is carried out without a step of applying an interlayer between interconnects and dielectric material. On account of the self-passivation effect of aluminum, a thin Al 2 O 3 film, which protects the interconnect from corrosion, is formed on the interconnects.
1. A method of electrically insulating interconnects, which comprises the following steps:
providing a semiconductor wafer having a substrate;
forming mutually adjacent metallic interconnects, comprising an aluminum-containing alloy, on the substrate;
subsequently exposing the semiconductor wafer to an oxidizing atmosphere after the metallic interconnects have been formed;
subsequently applying a heat-polymerizable dielectric material to the metallic interconnects; and
increasing and holding a temperature of the semiconductor wafer to thereby polymerize the dielectric material.
2. The method according to claim 1 , wherein the polymerized dielectric material has a dielectric constant of less than 4.
3. The method according to claim 1 , which further comprises applying an SiO 2 layer after the step of increasing and holding the temperature for heating the substrate.
4. The method according to claim 1 , wherein the dielectric material is chosen to be flowable on exposure to heat.
5. The method according to claim 1 , wherein the dielectric material releases water upon being polymerized.
6. The method according to claim 1 , wherein, subsequently to the formation of the metallic interconnects, the dielectric material is applied without a moisture barrier layer previously having been deposited.
7. The method according to claim 1 , which comprises exposing the semiconductor wafer to ambient air after the formation of the metallic interconnects.
8. The method according to claim 1 , which comprises treating the semiconductor wafer with an oxygen plasma after the formation of the metallic interconnects.