Digital to analog converter system

1. A control arrangement comprising:

a digital-to-analog converter; and

a mode controller for providing said digital-to-analog converter with a plurality of reference voltages (Vref) under a respective plurality of operating modes;

said plurality of operating modes including a first mode in which said digital-to-analog converter provides said analog output voltage at a first resolution, and a second mode in which said digital-to-analog converter provides said analog output voltage at a second resolution which is a scaled value of said first resolution.

2. The control arrangement of claim 1 , wherein:

said digital-to-analog converter comprises:

a digital word input operative to receive an N-bit digital word,

a reference voltage input operative to receive a reference voltage (Vref), and

an analog voltage output operative to output an analog voltage as a percentage of the reference voltage (Vref) in response to said N-bit digital word,

said digital-to-analog converter having a first resolution; and

said mode controller includes control circuitry connected to said reference voltage input.

3. The control arrangement of claim 2 , wherein said first resolution equals 1/(2 n −1) and said second resolution equals 1/(2 n+1 −1).

4. The control arrangement of claim 2 , wherein, said control circuitry comprises a voltage divider and switching circuitry.

5. The control arrangement of claim 4 , wherein said switching circuitry comprises a switch (SW 1 ) operative via an external control signal.

6. The control arrangement of claim 4 , wherein said voltage divider defines a control point voltage, said control point voltage determining the reference voltage (Vref) of said plurality of reference voltages.

7. The control arrangement of claim 6 , wherein said voltage divider comprises a first resistor R 1 and a second resistor R 2 , and said control point voltage is defined by said control point equaling R 1 /(R 1 +R 2 ) times said reference voltage (Vref).

8. A control arrangement comprising:

means for converting a digital signal to an analog signal; and

means for providing said means for converting with a plurality of reference voltages (Vref) under a respective plurality of operating modes wherein, in a first mode of said plurality of operating modes, said means for converting a digital signal to an analog signal provides said analog output voltage at said first resolution, and in a second mode of said plurality of operating modes, said means for converting a digital signal to an analog signal provides said analog output voltage at a second resolution which is a scaled model of said first resolution.

9. The control arrangement of claim 8 , wherein:

said means for converting a digital signal to an analog signal comprises:

means for converting an N-bit digital word into an analog voltage,

means for receiving an N-bit digital word,

means for receiving the reference voltage (Vref), and

means for outputting an analog voltage as a percentage of said reference voltage in response to said N-bit digital word,

said means for converting a digital signal to an analog signal having a first resolution; and

said means for providing said means for converting with a plurality of reference voltages (Vref) under a respective plurality of operating modes comprises:

means, connected to said means for receiving the reference voltage (Vref), for controlling said means for converting a digital signal to an analog signal.

10. The control arrangement of claim 9 , wherein said first resolution equals 1/(2 n −1) and said second resolution equals 1/(2 n+1 −1).

11. The control arrangement of claim 10 , wherein said means for controlling said means for converting a digital signal to an analog signal, includes means for dividing a voltage and means for switching said means for dividing.

12. The control arrangement of claim 11 , wherein said means for switching said means for dividing comprises a (SW 1 ) operative via an external control signal.

13. The control arrangement of claim 11 , wherein said means for dividing a voltage defines a control point voltage, said control point voltage determining the reference voltage (Vref) of said plurality of reference voltages.

14. The control arrangement of claim 13 , wherein said means for dividing a voltage comprises a first resistor R 1 and a second resistor R 2 , and said control point voltage is defined by said control point equaling R 1 /(R 1 +R 2 ) times said reference voltage.

15. A control method comprising:

providing a digital-to-analog converter;

providing a mode controller coupled to said digital-to-analog converter that is operative to provide said digital-to-analog converter with a plurality of reference voltages (Vref) under a respective plurality of operating modes; and

selectively dividing the reference voltage in response to a control signal to provide a first mode of operation and a second mode of operation, wherein said first mode of operation provides the analog output voltage at a first resolution and up to a first reference voltage, and said second mode of operation provides the analog output voltage at a second resolution which is a scaled model of said first resolution.

16. The control method of claim 15 , further comprising:

providing a reference voltage to the digital-to-analog converter;

inputting an N-bit digital word into the digital-to-analog converter to obtain an analog output voltage representing the N-bit digital word.

17. The control method of claim 16 , wherein selectively dividing includes:

selectively dividing the reference voltage via a voltage divider and switching circuitry, the switching circuitry responsive to the control signal.

18. The control method of claim 17 , wherein selectively dividing includes said first mode providing a first resolution equaling 1/(2 n −1) and said second mode providing a second resolution equaling 1/(2 n+1 −1).

19. The control method of claim 17 , wherein selectively dividing includes determining a control point voltage, wherein said control point voltage determines said second percentage voltage of said reference voltage.

20. The control method of claim 19 , wherein determining a control point voltage includes providing a voltage divider comprising a first resistor R 1 and a second resistor R 2 , and determining a control point voltage includes determining the control point voltage via a relationship of control point voltage equaling R 1 /(R 1 +R 2 ) times the reference voltage.