Plural semiconductor devices in monolithic flip chip
View Patent ↗A flip chip structure contains laterally spaced semiconductor devices such as MOSFETs in a common chip. A deep trench isolates the devices. Contacts are connected to the source drain and gate electrode (or other electrodes) and are interconnected as required for a circuit function either within the chip or on the support board. Ball contacts are connected to the electrodes. The opposite surface of the chip to that in which the devices are formed receives a copper or other metal layer which is patterned to increase its area for heat exchange. The surface of the copper is coated with black oxide to increase its ability to radiate heat.
1. An integrated flip chip structure with top and bottom sides, comprising a single chip of silicon having a top junction receiving surface; a first and second semiconductor devices, each having a respective set of junction patterns and a respective set of terminal metals; said respective sets of junction patterns being formed in respective and laterally spaced areas of said top junction receiving surface; said respective sets of terminal metals for said first and second devices being laterally spaced from one another and being disposed atop said top junction receiving surface such that all of said terminal metals are accessed from the top side of said flip chip structure wherein said first and second semiconductor devices are MOSFET devices of a substantially similar junction pattern having respective source, drain and gate terminal metals.
2. The device of claim 1 which includes a deep isolation trench extending into said top junction receiving surface and enclosing said area containing only one of said first or second set of junction patterns.
3. The device of claim 1 wherein said terminal metals each include at least one respective contact ball.
4. The device of claim 3 wherein said device has five terminal connectors comprising a first terminal connector to the drain terminal metals of said first device, a second terminal connector connected to said source terminal metal of said second device; a third terminal connector connected to said source terminal metal of said first device and to said drain terminal metal of said second device; and fourth and fifth terminal connectors connected to said gates of said first and second devices respectively.
5. The device of claim 1 wherein said terminal metals each include a respective contact ball.
6. The device of claim 1 wherein said device has five terminal connectors comprising a first terminal connector to the drain terminal metal of said first device, a second terminal connector connected to said source terminal metals of said second device; a third terminal connector connected to said source terminal metal of said first device and to said drain terminal metal of said second device; and fourth and fifth terminal connectors connected to said gates of said first and second devices respectively.
7. The device of claim 6 , wherein said device is connectable directly within a synchronous buck converter circuit.
8. The device of claim 6 wherein said terminal connectors comprise spaced metallized patterns on a support board which receives said integrated structure.
9. The device of claim 6 wherein the opposite surface of said chip from said top junction receiving surface has a metallized layer thereon; said metallized layer being patterned to define heat sink fins for improved cooling of said chip when said junction receiving surface of said chip is mounted on a support board.
10. The device of claim 6 wherein the opposite surface of said chip from said top junction receiving surface has a metallized layer thereon; and a high thermal emissivity layer on the outer surface of said metallized layer.
11. The device of claim 1 wherein the opposite surface of said chip from said top junction receiving surface has a metallized layer thereon; said metallized layer being patterned to define heat sink fins for improved cooling of said chip when said junction receiving surface of said chip is mounted on a support board.
12. The device of claim 1 wherein the opposite surface of said chip from said top junction receiving surface has a metallized layer thereon; and a high thermal emissivity layer on the outer surface of said metallized layer.
13. The device of claim 12 wherein said high emissivity layer is a black oxide.
14. A flip chip semiconductor device having opposite first and second surfaces and comprising first and second semiconductor devices each with a respective set of terminal contacts all accessed from the first surface for connection to a support surface; second surface having a metallized layer thereon; said metallized layer being patterned to define heat sink fins for improved cooling of said chip when said terminal contacts of said chip are mounted on a support board.
15. The device of claim 14 wherein said metallized layer is copper.
16. The device of claim 14 which further includes a high thermal emissivity layer on the surface of said metallized layer.
17. The device of claim 16 wherein said high emissivity layer is a black oxide.
18. The device of claim 17 wherein said metallized layer is copper.
19. A flip chip semiconductor device having opposite first and second surfaces and comprising first and second semiconductor devices each with a respective set of terminal contacts all accessed from the first surface for connection to a support surface; said second surface having and a metallized layer thereon; and a high thermal emissivity layer on the surface of said metallized layer.
20. The device of claim 19 wherein said high emissivity layer is a black oxide.
21. The device of claim 20 wherein said metallized layer is copper.
22. An integrated flip chip structure with top and bottom sides, comprising a single chip of silicon having a top junction receiving surface; a first and second semiconductor devices, each having a respective set of junction patterns and a respective set of terminal metals; said respective sets of junction patterns being formed in respective and laterally spaced areas of said top junction receiving surface; said respective sets of terminal metals for said first and second devices being laterally spaced from one another and being disposed atop said top junction receiving surface such that all of said terminal metals are accessed from the top side of said flip chip structure, wherein said device has five terminal connectors comprising a first terminal connector to a drain terminal metal of said first device, a second terminal connector connected to a source terminal metal of said second device; a third terminal connector connected to a source terminal metal of said first device and to a drain terminal metal of said second device; and fourth and fifth terminal connectors connected to gates of said first and second devices respectively.