ATM-port with integrated ethernet switch interface
View Patent ↗An ATM-port module for an ATM-node having an Ethernet switch includes an ATM-controller; and an Ethernet-switch interface connecting it to the Ethernet switch. The switch has an Ethernet encapsulating-unit for encapsulating ATM cells processes by the ATM-controller into packets for transmission to the switch, and an Ethernet decapsulating-unit for extracting ATM cells from packets received from the switch. The module further includes a segmentation-and-reassembly unit; and a buffering-and-scheduling unit. The buffering-and-scheduling unit provides a processed enlarged-ATM-cell to the encapsulating-unit when an indication flag indicates that an ATM port is a destination port of the enlarged ATM-cell; and a processed enlarged-ATM-cell to the segmentation-and-reassembly unit when an indication flag indicates that an Ethernet port is the enlarged ATM-cell's destination port.
1. An ATM-port module for an ATM-node having an Ethernet switch, the ATM-port module comprising:
an ATM-controller;
an Ethernet-switch interface connecting the ATM-controller to the Ethernet switch, the Ethernet-switch interface having an Ethernet encapsulating-unit for encapsulating ATM cells processed by the ATM-controller into Ethernet packets for transmission to the Ethernet switch, and an Ethernet decapsulating-unit for extracting ATM cells from Ethernet packets received from the Ethernet switch,
a segmentation-and-reassembly unit; and
a buffering-and-scheduling unit for
providing a processed enlarged-ATM-cell, the processed enlarged-ATM-cell including destination information, to the Ethernet encapsulating-unit when an indication flag indicates that an ATM port is a destination port of the enlarged ATM-cell; and
providing the processed enlarged-ATM-cell to the segmentation-and-reassembly unit when the indication flag indicates that an Ethernet port is the destination port of the enlarged ATM-cell.
2. The ATM-port module of claim 1 , wherein the ATM controller comprises:
an ATM-to-Ethernet signal path, and
an Ethernet-to-ATM signal path.
3. The ATM-port module of claim 2 , wherein the ATM-to-Ethernet signal path comprises:
an ATM-header detector unit for detecting headers of received ATM cells;
an ATM-OAM-processor for performing operation and maintenance functions depending on OAM parameters read from a queue look-up-table of the memory,
a buffering-and-scheduling unit for buffering and scheduling the processed ATM-cells and for generating enlarged ATM-cells, each of which includes a port address of the ATM node, the port address being read from a memory.
4. The ATM-port module of claim 3 , wherein the Ethernet-to-ATM-signal-path of the ATM controller comprises:
a buffering-and-scheduling unit for buffering and scheduling ATM cells received from the Ethernet-switch interface;
an ATM-OAM-processor for performing operation and maintenance functions depending on OAM-parameters read from a memory;
an ATM-header translator.
5. The ATM-port module of claim 1 , wherein the ATM-controller comprises a memory for storing:
a header look-up-table; and
a queue look-up-table.
6. The ATM-port module of claim 5 , wherein the header look-up-table is configured to store, for each detected ATM-cell header:
a corresponding port-address of a destination port of the ATM node;
OAM parameters; and
a queue number.
7. The ATM-port module of claim 6 , wherein the queue number comprises a pointer to a corresponding entry in the queue look-up-table.
8. The ATM-port module of claim 6 , wherein the queue look-up-table is configured to store, for each queue number:
corresponding queue parameters; and
an indication flag indicative of a destination port of a received ATM cell.
9. The ATM-port module according to claim 8 , wherein the indication flag is indicative of whether the destination port is an ATM port or an Ethernet port.
10. The ATM-port module according to claim 1 ,
wherein the segmentation-and-reassembly unit is configured to discard an ATM header of an enlarged ATM-cell; and
the ATM-port module further comprises an Ethernet-packet generator for receiving a payload of the enlarged ATM-cell that includes at least one ATM cell.
11. The ATM-port module according to claim 10 , wherein the Ethernet-packet generator is configured to:
read interworking-type data from a memory, and to
generate an Ethernet packet on the basis of the interworking-type data.
12. An ATM-port module for an ATM-node having an Ethernet switch, the ATM-port module comprising:
an ATM-controller;
an Ethernet-switch interface connecting the ATM-controller to the Ethernet switch;
a memory for storing a header look-up-table, and a queue look-up-table; and
a buffering-and-scheduling unit for
providing a processed enlarged-ATM-cell, the processed enlarged-ATM-cell including a destination port address, to the Ethernet encapsulating-unit when an indication flag indicates that an ATM port is a destination port of the enlarged ATM-cell; and
providing the processed enlarged-ATM-cell to the segmentation-and-reassembly unit when the indication flag indicates that an Ethernet port is the destination port of the enlarged ATM-cell;
wherein the header look-up-table is configured to store, for each detected ATM-cell header, a corresponding port-address of a destination port of the ATM node, OAM parameters, and a queue number that includes a pointer to a corresponding entry in the queue look-up-table; and
wherein the queue look-up-table is configured to store, for each queue number: corresponding queue parameters; and an indication flag indicative of a destination port of a received ATM cell.
13. The ATM-port module of claim 12 , wherein the Ethernet-switch interface comprises:
an Ethernet encapsulating-unit for encapsulating ATM cells processed by the ATM-controller into Ethernet packets for transmission to the Ethernet switch, and
an Ethernet decapsulating-unit for extracting ATM cells from Ethernet packets received from the Ethernet switch.
14. The ATM-port module according to claim 13 , further comprising:
a segmentation-and-reassembly unit.
15. The ATM-port module of claim 12 , wherein the ATM controller comprises:
an ATM-to-Ethernet signal path, and
an Ethernet-to-ATM signal path.
16. The ATM-port module of claim 15 , wherein the ATM-to-Ethernet signal path comprises:
an ATM-header detector unit for detecting headers of received ATM cells;
an ATM-OAM-processor for performing operation and maintenance functions depending on OAM parameters read from a queue look-up-table of the memory,
a buffering-and-scheduling unit for buffering and scheduling the processed ATM-cells and for generating enlarged ATM-cells, each of which includes a port address of the ATM node, the port address being read from a memory.
17. The ATM-port module of claim 15 , wherein the Ethernet-to-ATM-signal-path of the ATM controller comprises:
a buffering-and-scheduling unit for buffering and scheduling ATM cells received from the Ethernet-switch interface;
an ATM-OAM-processor for performing operation and maintenance functions depending on OAM-parameters read from the memory;
an ATM-header translator.
18. The ATM-port module according to claim 12 , wherein the indication flag is indicative of whether the destination port is an ATM port or an Ethernet port.
19. The ATM-port module according to claim 12 , wherein a segmentation-and-reassembly unit is configured to discard an ATM header of an enlarged ATM-cell; and
the ATM-port module further comprises an Ethernet-packet generator for receiving a payload of the enlarged ATM-cell that includes at least one ATM cell.
20. The ATM-port module according to claim 19 , wherein the Ethernet-packet generator is configured to:
read interworking-type data from the memory, and to
generate an Ethernet packet on the basis of the interworking-type data.