IP Library Granted Patent US 6,918,010
Granted Patent B1
US 6,918,010 · App. 10/272,642 · Granted Jul 12, 2005

Method and system for prefetching data

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Quick Facts
Patent No.
US 6,918,010
App. No.
10/272,642
Granted
Jul 12, 2005
Kind
B1
Abstract

In prefetching cache lines from a main memory to a cache memory, an array of memory locations to be prefetched is determined and a base address indicating a highest address in the array is identified as well as a loop index used to point to the first address in the array. A prefetch index, which is the loop index plus a latency/transfer value, is used to prefetch memory locations as the array is processed. After a memory location is prefetched and initialized, the loop index and the prefetch index are incremented. The prefetch index is compared to a threshold value. If the prefetch index is less than the threshold value, then the next memory location in the array is prefetched and the prefetch index is again incremented and compared to the threshold value. If the prefetch index is equal to or greater than the threshold value, then the prefetch instruction is converted to a no operation instruction to prevent memory locations outside of the array from being prefetched during the processing of the array.

Claims (44)

1. A method for prefetching data, comprising:

identifying an array of memory locations in a main memory, each memory location in the array being associated with an address;

identifying a highest address of the array;

setting a prefetch index pointer to a prefetch address of a memory location in the array to be prefetched based on the highest address of the array;

performing a prefetch instruction to prefetch the memory location in the array to be prefetched in response to the prefetch index pointer being less than a threshold value;

converting the prefetch instruction to a no operation instruction in response to the prefetch index pointer reaching and exceeding the threshold value.

2. The method of claim 1 , further comprising:

incrementing the prefetch index pointer.

3. The method of claim 2 , wherein the prefetch index pointer is incremented according to a size of the memory location.

4. The method of claim 3 , wherein the size of the memory location is a cache line of 128 bytes.

5. The method of claim 2 , further comprising:

performing a prefetch instruction to prefetch a next memory location according to the incremented prefetch index pointer in response to the incremented prefetch index pointer being less than the threshold value;

converting the prefetch instruction into a no operation instruction in response to the incremented prefetch index pointer reaching and exceeding the threshold value.

6. The method of claim 1 , wherein the highest address of the array indicates an end of the array.

7. The method of claim 6 , further comprising:

preventing prefetching of memory locations beyond the end of the array.

8. The method of claim 1 , further comprising:

initializing the memory location upon being prefetched.

9. The method of claim 1 , wherein the threshold value is zero.

10. The method of claim 1 , further comprising:

establishing the threshold value according to the highest address of the array.

11. A computer readable medium having code for prefetching data, the code operable to:

identify an array of memory locations in a main memory to be prefetched to a cache memory, each memory location in the array being associated with an address;

identify a highest address of the array;

set an index pointer to a prefetch address of a memory location in the array to be prefetched based on the highest address of the array;.

perform a prefetch operation to prefetch the memory location in the array to be prefetched at the prefetch address in response to the index pointer being less than a threshold value;

convert the prefetch operation to a no operation in response to the index pointer reaching or exceeding the threshold value.

12. The computer readable medium of claim 11 , wherein the code is further operable to:

increment the index pointer;

perform a prefetch operation to prefetch a next memory location according to the incremented index pointer in response to the incremented index pointer being less than a threshold value;

convert the prefetch operation to a no operation in response to the incremented index pointer reaching or exceeding the threshold value.

13. The computer readable medium of claim 11 , wherein the code is further operable to:

initialize the memory location upon completion of the prefetch operation.

14. The computer readable medium of claim 11 , wherein the code is further operable to:

prevent prefetching of a memory location outside of the array.

15. The computer readable medium of claim 11 , wherein the threshold value is zero.

16. A system for prefetching data, comprising:

a main memory operable to store data in a plurality of memory locations;

a cache memory operable to stored contents of desired ones of the plurality of memory locations;

a processor operable to access data from the main memory, the processor operable to have data placed into the cache memory, the processor operable to prefetch data for placement into the cache memory in anticipation of a future use, the processor operable to identify an array of memory locations associated with data to be prefetched, each of the memory locations in the array being associated with an address, the processor operable to set an index pointer to a prefetch address of a memory location in the array to be prefetched based on a highest address of the array, the processor operable to determine whether the index pointer is less than a threshold value, the processor operable to perform a prefetch operation to prefetch the memory location in the array to be prefetched at the prefetch address in response to the index pointer being less than the threshold value, the processor operable to convert the prefetch operation into a no operation in response to the index pointer reaching or exceeding the threshold value.

17. The system of claim 16 , wherein the processor is operable to increment the index pointer, the processor operable to perform the prefetch operation to prefetch a next memory location according to the incremented index pointer in response to the index pointer being less than the threshold value, the processor operable to convert the prefetch operation into a no operation in response to the index pointer reaching or exceeding the threshold value.

18. The system of claim 16 , wherein the processor is operable to prevent prefetching a memory location outside of the array.

19. The system of claim 16 , wherein the processor is operable to initialize the prefetched memory location in the cache memory.

20. The system of claim 19 , wherein the processor initializes the prefetched memory location by clearing the contents of the prefetched memory location.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2013
From: GRAPHICS PROPERTIES HOLDINGS, INC.
To: LG ELECTRONICS, INC.
Reel/Frame 029604/0090 →
CHANGE OF NAME Recorded Aug 26, 2009
From: SILICON GRAPHICS, INC.
To: GRAPHICS PROPERTIES HOLDINGS, INC.
Reel/Frame 023134/0827 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2007
From: GENERAL ELECTRIC CAPITAL CORPORATION
To: MORGAN STANLEY & CO., INCORPORATED
Reel/Frame 019995/0895 →
SECURITY INTEREST Recorded Oct 24, 2006
From: SILICON GRAPHICS, INC.
To: GENERAL ELECTRIC CAPITAL CORPORATION
Reel/Frame 018545/0777 →
SECURITY AGREEMENT Recorded Aug 19, 2005
From: SILICON GRAPHICS, INC. AND SILICON GRAPHICS FEDERAL, INC. (EACH A DELAWARE CORPORATION)
To: WELLS FARGO FOOTHILL CAPITAL, INC.
Reel/Frame 016871/0809 →