IP Library Granted Patent US 6,864,414
Granted Patent B2
US 6,864,414 · App. 10/280,593 · Granted Mar 8, 2005

Apparatus and method for integral bypass diode in solar cells

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Quick Facts
Patent No.
US 6,864,414
App. No.
10/280,593
Granted
Mar 8, 2005
Kind
B2
Abstract

A solar cell having a multijunction solar cell structure with a bypass diode is disclosed. The bypass diode provides a reverse bias protection for the multijunction solar cell structure. In one embodiment, the multifunction solar cell structure includes a substrate, a bottom cell, a middle cell, a top cell, a bypass diode, a lateral conduction layer, and a shunt. The lateral conduction layer is deposited over the top cell. The bypass diode is deposited over the lateral conduction layer. One side of the shunt is connected to the substrate and another side of the shunt is connected to the lateral conduction layer. In another embodiment, the bypass diode contains an i-layer to enhance the diode performance.

Claims (88)

1. A solar device comprising:

a substrate:

a multijunction solar cell structure having at least first, second, and third subcells disposed over the substrate;

a lateral conduction layer deposited over at least a portion of the multijunction solar cell structure;

a bypass diode having p-type, i-type, and n-type layers, deposited over the lateral conduction layer; and

a well in the multijunction solar cell structure to provide electrical separation between the subcells and the bypass diode.

2. The solar device of claim 1 , further comprising a shunt having first and second contacting ends, wherein the first contacting end of the shunt is connected to the lateral conduction layer and the second contacting end of the shunt is connected to the substrate via the well.

3. The solar device of claim 1 , further comprising a stop etch layer deposited over the lateral conduction layer.

4. The solar device of claim 1 , further comprising first and second contact layers, wherein the first contact layer is deposited adjacent the bypass diode and the second contact layer is disposed adjacent the substrate.

5. A solar device comprising,

a substrate, wherein the substrate is a germanium (“Ge”) substrate;

a multijunction solar cell structure having at least first, second, and third subcells disposed over the substrate;

a lateral conduction layer deposited over at least a portion of the multi junction solar cell structure; and

a bypass diode having p-type, i-type, and n-type layers, deposited over the lateral conduction layer.

6. The solar device of claim 5 , wherein the multijunction solar cell structure is a triple junction solar cell.

7. The solar device of claim 6 , wherein the first subcell is a bottom solar cell, the second subcell is a middle solar cell, and the third subcell is a top solar cell.

8. The solar device of claim 7 , wherein the bottom solar cell further includes:

a p-doped Ge base layer deposited over the Ge substrate;

an n-doped Ge emitter layer deposited or formed by diffusion over the base layer; and

an n-doped nucleation layer deposited over the Ge emitter layer.

9. The solar device of claim 8 , wherein the middle solar cell further includes:

a p-doped back surface field (“BSF”) layer deposited over the bottom solar cell;

a p-doped gallium arsenic (“GaAs”) base layer deposited over the BSF layer;

an n-doped GaAs emitter layer deposited over the GaAs base layer; and

an n-doped indium gallium phosphide 2 (“InGaP 2 ”) window layer deposited over the GaAs emitter layer.

10. The solar device of claim 9 , wherein the top solar cell further includes:

a p-doped indium gallium aluminum phosphide (“InGaAlP”) back surface field (“BSF”) layer deposited over the middle solar cell;

a p-doped GaInP 2 base layer deposited over the InGaAlP BSF layer;

an n-doped GaInP 2 emitter layer deposited over the InGaP 2 base layer; and

an n-doped aluminum indium phosphide 2 (“AlInP 2 ”) window layer deposited over the GaInP 2 emitter layer.

11. The solar device of claim 10 , further comprising an n-doped GaAs cap layer deposited between the top solar cell and the lateral conduction layer.

12. The solar device of claim 11 , wherein the lateral conduction layer is an n-doped GaAs layer for conducting electrical current.

13. A solar device comprising:

a substrate

a multijunction solar cell structure having at least first, second, and third subcells disposed over the substrate;

a lateral conduction layer deposited over at least a portion of the multijunction solar cell structure;

a bypass diode having p-type, i-type, and n-type, layers, deposited over the lateral conduction layer; wherein the p-type layer of the bypass diode is a p-doped GaAs layer and the n-type layer of the bypass diode is an n-doped GaAs layer.

14. The solar device of claim 13 , wherein the i-type layer is a lightly doped GaAs layer for reducing defect breakdown.

15. The solar device of claim 13 , wherein the i-type layer is an undoped GaAs layer for reducing defect breakdown.

16. A solar cell structure comprising:

at least one solar cell disposed over a germanium (“Ge”) substrate;

a lateral conduction layer deposited over a portion of the solar cell structure;

a bypass diode deposited over the lateral conduction layer; and

a shunt having first and second contacting sides formed between the solar cell and the bypass diode, wherein the first contacting side of the shunt is connected to the substrate and the second contacting side of the shunt is connected to the lateral conduction layer.

17. The solar cell structure of claim 16 , further comprising a well situated between the solar cell and the bypass diode, wherein the well provides electrical separation between the solar cell and the diode.

18. The solar cell structure of claim 17 , further comprising a stop etch layer deposited over the lateral conduction layer.

19. The solar cell structure of claim 18 , further comprising first and second contact layers, wherein the first contact layer is deposited over the bypass diode and the second contact layer is disposed over the substrate.

20. The solar cell structure of claim 16 , wherein the solar cell contains bottom, middle, and top subcells.

21. The solar cell structure of claim 20 , wherein the bottom subcell further includes:

a Ge base layer deposited over the substrate;

a Ge emitter layer deposited or formed by diffusion over the base layer; and

a nucleation layer deposited over the emitter layer.

22. The solar cell structure of claim 21 , wherein the middle subcell further includes:

a back surface field (“BSF”) layer deposited over the bottom solar cell;

a gallium arsenic (“GaAs”) base layer deposited over the BSF layer;

a GaAs emitter layer deposited over the GaAs base layer; and

an indium gallium phosphide 2 (“lnGaP 2 ”) window layer deposited over the GaAs emitter layer.

23. The solar cell structure of claim 22 , wherein the top subcell further includes:

an indium gallium aluminum phosphide (“InGaAlP”) back surface field (“BSF”) layer deposited over the middle solar cell;

a GaInP 2 base layer deposited over the InGaAlP BSF layer;

a GaInP 2 emitter layer deposited over the InGaP 2 base layer; and

an aluminum indium phosphide 2 (“AlInP 2 ”) window layer deposited over the GaInP 2 emitter layer.

24. The solar cell structure of claim 23 , further comprising a GaAs cap layer deposited between the top subcell and the lateral conduction layer.

25. The solar cell structure of claim 16 , wherein the lateral conduction layer is a GaAs layer for transporting electrical current.

26. The solar cell structure of claim 16 , wherein the bypass diode further includes an n-doped GaAs layer deposited over the lateral conduction layer and a p-doped GaAs layer deposited over the n-doped GaAs layer of the bypass diode.

27. The solar cell structure of claim 16 , wherein the bypass diode further includes a p-doped GaAs layer deposited over the lateral conduction layer and an n-doped GaAs layer deposited over the p-doped GaAs layer of the bypass diode.

28. The solar cell structure of claim 27 , wherein the bypass diode further includes an i-type layer, which is a lightly n-doped GaAs layer and deposited between the n-doped GaAs layer of the bypass diode and the p-doped GaAs layer of the bypass diode, for reducing defect breakdown.

29. The solar cell structure of claim 27 , wherein the bypass diode further includes an i-type layer, which is an undoped GaAs layer and deposited between the n-doped GaAs layer of the bypass diode and the p-doped GaAs layer of the bypass diode, for reducing defect breakdown.

30. A method for manufacturing a solar device comprising:

depositing a germanium (“Ge”) substrate;

depositing a solar cell having multiple junctions on the Ge substrate;

depositing a lateral conduction layer on the solar cell;

depositing a bypass diode over the lateral conduction layer;

etching a well between the bypass diode and the solar cell; and

depositing a shunt between the Ge substrate and the bypass diode through the well, wherein one side of the shunt is connected to the Ge substrate and another side of the shunt is connected to the lateral conduction layer.

31. The method of claim 30 , further comprising depositing a stop etch layer between the lateral conduction layer and the bypass diode.

32. The method of claim 30 , further comprising:

depositing a first metal layer on the bypass diode for contact pad; and

depositing a second metal layer on the Ge substrate for contact pad.

33. The method of claim 30 , wherein depositing a bypass diode further includes:

depositing a n-doped gallium arsenic (“GaAs”) base layer over a stop etch layer;

depositing a i-doped GaAs layer over the n-doped GaAs base layer; and

depositing a p-doped GaAs emitter layer over the i-doped GaAs layer.

34. The method of claim 30 , wherein depositing a solar cell further includes:

depositing a Ge bottom subcell including a nucleation layer;

depositing a GaAs middle subcell over the bottom subcell; and

depositing a GaInP 2 top subcell over the middle subcell.

35. The method of claim 34 , further comprising depositing a GaAs cap layer between the top subcell and the lateral conduction layer.

Assignments (7)
SECURITY INTEREST Recorded Apr 17, 2019
From: SOLAERO TECHNOLOGIES CORP.
To: CITIZENS BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 048930/0952 →
NOTICE OF RELEASE OF SECURITY INTEREST IN PATENTS Recorded Apr 12, 2019
From: CITIZENS BANK, N.A. (SUCCESSOR BY MERGER TO CITIZENS BANK OF PENNSYLVANIA), AS ADMINISTRATIVE AGENT
To: SOLAERO TECHNOLOGIES CORP.
Reel/Frame 048877/0802 →
NOTICE OF RELEASE OF SECURITY INTEREST IN PATENTS Recorded Apr 12, 2019
From: CITIZENS BANK, N.A. (SUCCESSOR BY MERGER TO CITIZENS BANK OF PENNSYLVANIA), AS ADMINISTRATIVE AGENT
To: SOLAERO SOLAR POWER INC. (F/K/A EMCORE SOLAR POWER, INC)
Reel/Frame 049455/0179 →
SECURITY INTEREST Recorded Oct 17, 2018
From: SOLAERO TECHNOLOGIES CORP.
To: CITIZENS BANK OF PENNSYLVANIA, AS ADMINISTRATIVE AGENT FOR THE SECURED PARTIES
Reel/Frame 047246/0418 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2015
From: EMCORE SOLAR POWER, INC.
To: SOLAERO TECHNOLOGIES CORP.
Reel/Frame 034750/0211 →
SECURITY INTEREST Recorded Dec 12, 2014
From: EMCORE SOLAR POWER, INC.
To: CITIZENS BANK OF PENNSYLVANIA, AS ADMINISTRATIVE AGENT
Reel/Frame 034612/0961 →
RELEASE OF SECURITY INTEREST Recorded Dec 10, 2014
From: WELLS FARGO BANK, N.A.
To: EMCORE SOLAR POWER, INC.
Reel/Frame 034590/0761 →