High availability Ethernet backplane architecture
View Patent ↗A high availability backplane architecture. The backplane system includes redundant node boards operatively communicating with redundant switch fabric boards. Uplink ports of the node boards are logically grouped into trunk ports at one end of the communication link with the switch fabric boards. The node boards and the switch fabric boards routinely perform link integrity checks when operating in a normal mode such that each can independently initiate failover to working ports when a link failure is detected. Link failure is detected either by sending a link heartbeat message after the link has had no traffic for a predetermined interval, or after receiving a predetermined consecutive number of invalid packets. Once the link failure is resolved, operation resumes in normal mode.
1. A method for determining failure of a communications link, the steps comprising:
setting, by a computing device, a timer for a predetermined interval;
waiting the predetermined interval for a link heartbeat packet;
determining whether an end-of-frame packet is received;
in response to determining that the end-of-frame indication has been received, determining whether a good frame is received;
in response to determining that an end-of-frame packet has not been received, determining whether the timer has expired;
in response to determining that the timer has expired, determining whether receiving is in progress;
entering a pending status if the receiving is not in progress;
determining whether a central processing unit (CPU) verification has failed;
in response to determining that the CPU verification has not failed, resetting the timer;
increasing an error count;
determining whether the error count exceeds a predetermined value;
in response to determining that the error count exceeds the predetermined value, entering the pending status;
in response to determining that the error count does not exceed a predetermined value, determining whether the end-of-frame indication is not received; and
sending, by the computing device, link failover data to a switch fabric board.
2. The method of claim 1 , the steps further comprising changing the status of the communication link to failure mode after a predetermined number of consecutive invalid packets are received.
3. A method for a switch fabric board having a redirect table to handle a link failure, the steps comprising:
performing a link integrity check for each link coupled to the switch fabric board, wherein performing an integrity check includes:
increasing an error count;
determining whether the error count exceeds a predetermined value;
in response to determining that the error count exceeds the predetermined value, entering a pending status;
in response to determining that the error count does not exceed a predetermined value, determining whether an end-of-frame indication is not received; and
enabling a link failover mode upon failure of a link integrity check, the steps of the link failover mode comprising:
sending link failure data to at least one other switch fabric board, updating a media access control table with link failure data, and
mapping a failed port to a redirect port;
determining whether the link failure is recovered;
sending link recover data to the working port; and
removing mapping of traffic to the working port.
4. The method of claim 3 , the performing step comprising:
setting a timer for a predetermined interval;
waiting the predetermined interval for a link heartbeat packet;
resetting the timer to the predetermined interval whenever a valid packet is received; and
changing the status of the communication link to a failure mode when the timer expires.
5. The method of claim 4 , the performing step further comprising changing the status of the communication link to failure mode after a predetermined number of consecutive invalid packets are received.
6. A method for sending a link heartbeat message, the steps comprising:
setting, by a computing device, a timer;
sending a link heartbeat packet when the timer expires;
determining whether an end-of-frame packet is received;
in response to determining that the end-of-frame indication has been received, determining whether a good frame is received;
in response to determining that an end-of-frame packet has not been received, determining whether the timer has expired;
in response to determining that the timer has expired, determining whether receiving is in progress;
entering a pending status if the receiving is not in progress;
determining whether a central processing unit (CPU) verification has failed;
in response to determining that the CPU verification has not failed, resetting the timer; and increasing an error count;
determining whether the error count exceeds a predetermined value;
in response to determining that the error count exceeds the predetermined value, entering the pending status;
in response to determining that the error count does not exceed a predetermined value, determining whether an end-of-frame indication is not received; and
sending, by the computing device, link failover data to a switch fabric board.
7. A telecommunications node that includes a non-transitory computer-readable medium that stores a program that, when executed by a computer, causes the computer to perform at least the following:
determine whether an end-of-frame packet is received;
in response to determining that an end-of-frame packet has not been received, determine whether the timer has expired;
in response to determining that the timer has expired, determine whether receiving is in progress;
enter a pending status if the receiving is not in progress;
determine whether a central processing unit (CPU) verification has failed;
in response to determining that the CPU verification has not failed, reset the timer;
increase an error count;
determine whether the error count exceeds a predetermined value;
in response to determining that the error count exceeds the predetermined value, enter a pending status; and
in response to determining that the error count does not exceed a predetermined value, determine whether an end-of-frame indication is not received; and
transmit heartbeat messages to a receiving node, the heartbeat messages comprising:
a destination media access control address;
a source media access control address;
an ethertype field indicating a media access control format; and an opcode,
wherein the ethertype value in hexadecimal is 88-08.
8. The telecommunications node of claim 7 wherein the opcode is an equivalent predetermined two byte value for the transmission module and for the receiving node.
9. The telecommunications node of claim 8 wherein the transmission module inserts padding bytes into the heartbeat messages sufficient to make each heartbeat message a packet 64 bytes in length.
10. The telecommunications node of claim 7 , wherein the program is further configured to cause the computer to perform at least the following:
in response to determining that the end-of-frame indication has been received, determine whether a good frame is received;
increase an error count;
determine whether the error count exceeds a predetermined value;
in response to determining that the error count exceeds the predetermined value, enter the pending status; and
in response to determining that the error count does not exceed a predetermined value, determine whether an end-of-frame indication is received.
11. The method of claim 1 , wherein, in response to determining that the CPU verification has failed, the method ends.