IP Library Granted Patent US 7,112,466
Granted Patent B2
US 7,112,466 · App. 10/293,510 · Granted Sep 26, 2006

Semiconductor device for isolating a photodiode to reduce junction leakage and method of formation

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Quick Facts
Patent No.
US 7,112,466
App. No.
10/293,510
Granted
Sep 26, 2006
Kind
B2
Abstract

An improved semiconductor device that reduces reverse bias junction leakage in a photodiode by using a junction isolation region to isolate the photodiode from a trench isolation region. The improved semiconductor device improves image quality for different applications such as stand-alone digital cameras and digital cameras embedded in other imaging devices such as cellular phones and personal digital assistants.

Claims (41)

1. A method for forming a semiconductor device, comprising:

providing a substrate;

forming a photodiode in the substrate, the photodiode receiving photoelectrons in response to photons received by the semiconductor device,

forming a trench isolation region in the substrate;

forming a junction isolation region in the substrate, the junction isolation region having an exterior surface that is between an exterior surface of the photodiode and the trench isolation region, wherein a doping level of the junction isolation region is higher than a doping level of the photodiode such that a depletion region of the photodiode is prevented from contacting a surface of the trench isolation region, thus lowering a junction leakage; and

forming an isolation surface implant, the isolation surface implant being situated within the photodiode and only in a portion of the photodiode, such that the isolation surface implant is in contact with a top surface of the substrate to provide electrical isolation between the photodiode and the top surface of the substrate, wherein the isolation surface implant is not covered by an insulating film.

2. The method of claim 1 , wherein the substrate is a P-type silicon substrate.

3. The method of claim 1 , wherein the step of forming a photodiode further comprises:

implanting in the substrate an N-type dopant.

4. The method of claim 3 , wherein the N-type dopant is phosphorous.

5. The method of claim 3 , further comprising:

implanting the N-type dopant with a carrier concentration implant dose in the range of about 1×10 15 to 1×10 16 ions/cm 2 .

6. The method of claim 1 , wherein the step of forming the junction isolation region further comprises:

depositing a P-type dopant, the P-type dopant being boron.

7. The method of claim 6 , wherein the P-type dopant is deposited by:

implanting the P-type dopant with a carrier concentration implant dose in the range of about 1×10 17 to 5×10 17 ions/cm 2 .

8. The method of claim 6 , wherein the P-type dopant has a thickness in the range of about 0.15 to 0.30 microns.

9. A method for forming a semiconductor device, comprising:

providing a substrate;

forming a photodiode in the substrate, the photodiode receiving photoelectrons in response to photons received by the semiconductor device;

forming a trench isolation region in the substrate;

forming a junction isolation region in the substrate, the junction isolation region formed between the photodiode and the trench isolation region so that the photodiode does not contact the trench isolation region;

forming an isolation surface implant, the isolation surface implant overlying the photodiode, the isolation surface implant being in contact with a top surface of the substrate to provide electrical isolation between the photodiode and the top surface of the substrate; and

forming a conduction surface implant, the conduction surface implant overlying the photodiode, the conduction surface implant being in contact with the top surface of the substrate to provide electrical contact between the photodiode and the top surface of the substrate.

10. The method of claim 9 , wherein the step of forming the conduction surface implant further comprises:

depositing an N-type dopant.

11. The method of claim 10 , wherein the step of depositing the N-type dopant further comprises depositing phosphorous.

12. The method of claim 10 , wherein the N-type dopant is deposited by:

implanting the N-type dopant with a carrier concentration implant dose in the range of about 1.5×10 12 to 3×10 13 ions/cm 2 ; and

implanting the N-type dopant at an energy level of about 40 kilo-electron volts.

13. A method for forming a semiconductor device, comprising:

providing a substrate;

forming a photodiode in the substrate, the photodiode receiving photoelectrons in response to photons received by the semiconductor device;

forming a trench isolation region in the substrate;

forming a junction isolation region in the substrate, the junction isolation region having an exterior surface that is between an exterior surface of the photodiode and the trench isolation region, wherein a doping level of the junction isolation region is higher than a doping level of the photodiode such that a depletion region of the photodiode is prevented from contacting a surface of the trench isolation region, thus lowering a junction leakage;

forming an isolation surface implant, the isolation surface implant being situated within the photodiode and only in a portion of the photodiode, such that the isolation surface implant is in contact with a top surface of the substrate to provide electrical isolation between the photodiode and the top surface of the substrate, wherein the isolation surface implant is not covered by an insulating film; and

wherein the step of forming the isolation surface implant further comprises a step of depositing a P-type dopant.

14. The method of claim 13 , wherein the step of depositing the P-type dopant further comprises depositing boron.

15. The method of claim 13 , wherein the P-type dopant is deposited by:

implanting the P-type dopant with a carrier concentration implant dose in the range of about 5×10 12 to 1×10 13 ions/cm 2 ; and

implanting the P-type dopant at an energy level of about 40 kilo-electron volts.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2022
From: PICTOS TECHNOLOGIES INC
To: RE SECURED NETWORKS LLC
Reel/Frame 060801/0001 →
CHANGE OF NAME Recorded Jun 15, 2021
From: IMPERIUM IP HOLDINGS (CAYMAN), LTD.
To: PICTOS TECHNOLOGIES INC.
Reel/Frame 056595/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2008
From: ESS TECHNOLOGY, INC.
To: IMPERIUM (IP) HOLDINGS
Reel/Frame 021316/0252 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2005
From: MANN, RICHARD A.
To: CONEXANT SYSTEMS, INC.
Reel/Frame 016261/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2004
From: PICTOS TECHNOLOGIES, INC.
To: ESS TECHNOLOGIES INTERNATIONAL, INC.
Reel/Frame 015494/0513 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2003
From: CONEXANT SYSTEMS, INC.
To: PICTOS TECHNOLOGIES, INC.
Reel/Frame 013851/0225 →