IP Library Granted Patent US 7,002,266
Granted Patent B1
US 7,002,266 · App. 10/294,842 · Granted Feb 21, 2006

Active DC output control and method for DC/DC converter

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Quick Facts
Patent No.
US 7,002,266
App. No.
10/294,842
Granted
Feb 21, 2006
Kind
B1
Abstract

A control loop system is provided that employs an active DC output control circuit that more accurately calibrates the desire voltage at a load, e.g. 3.3 volts, by adjusting a trim pin on a DC/DC converter. In a first embodiment, an active DC output control circuit calibrates a DC/DC converter that is connected to a single load. In a second embodiment, an active DC output control circuit calibrates multiple DC/DC converters that are connected to multiple loads.

Claims (73)

1. A system for a single load, comprising:

an active DC output control circuit;

a DC/DC converter having a trim pin and coupled to the active DC output control circuit; and

a load, coupled to the DC output control circuit and the DC/DC converter, the DC/DC converter generating a DC/DC output voltage level to the load;

wherein the DC output control circuit comprises an input voltage sensing and signal conditioning circuit;

wherein the input voltage sensing and signal conditioning circuit comprises a digital analog converter for scaling the DC/DC output voltage level based on a digital scaling factor without the use of analog to digital converter and a digital processor;

wherein the active DC output control circuit drives the trim pin for calibrating the DC/DC output voltage level.

2. A system for a single load, comprising:

an active DC output control circuit;

a DC/DC converter having a trim pin and coupled to the active DC output control circuit; and

a load, coupled to the DC output control circuit and the DC/DC converter, the DC/DC converter generating a DC/DC output voltage level to the load;

wherein the DC output control circuit comprises an input voltage sensing and signal conditioning circuit;

wherein the input voltage sensing and signal conditioning circuit comprises a digital analog converter;

wherein the active DC output control circuit drives the trim pin for calibrating the DC/DC output voltage level;

wherein the active DC output control circuit comprises a NV (non-volatile) memory;

wherein the NV memory stores only data for maintaining the desired output voltage settings.

3. The system of claim 2 , wherein the active DC output control circuit comprises:

a control logic, connected to the NV memory;

an input voltage sensing and signal conditioning circuit for receiving a V+ signal; and

a comparator, coupled to the input voltage sensing and signal conditioning circuit, for comparing a reference voltage and the V+ signal and generating a comparator output signal.

4. The system of claim 3 , wherein input voltage sensing and signal conditioning circuit comprises the digital analog converter, an amplifier, and a filter.

5. The system of claim 4 , further comprising a ground, coupled to the active DC output control circuit and the load.

6. A system for multiple loads, comprising:

an active DC output control circuit having a first of N control pins;

a first of N DC/DC converters, connected to the active DC output control circuit; and

a first of N loads, coupled to the DC output control circuit and the first of N DC/DC converters, the first of N DC/DC converters generating a DC/DC output voltage levels to the first of N loads;

wherein the DC output control circuit comprises an input voltage sensing and signal conditioning circuit;

wherein the input voltage sensing and signal conditioning circuit comprises a digital analog converter for scaling the DC/DC output voltage level based on a digital scaling factor without the use of analog to digital converter and a digital processor;

wherein the active DC output control circuit drives the first of N control pins for calibrating the DC/DC output voltage level for each load generated from the first of N DC/DC converters.

7. The system of claim 6 , further comprising:

a second of N DC/DC converters, coupled to the active DC output control circuit; and

a second of N loads, coupled to the DC output control circuit and the second of N DC/DC converters, the second of N DC/DC converters generating a DC/DC output voltage level to the second of N loads;

wherein the active DC output control circuit drives a second trim pin for calibrating the DC/DC output voltage level generated from the second of N DC/DC converters.

8. The system of claim 7 , further comprising a ground, coupled commonly to the first of N loads and the second of N loads.

9. The system of claim 6 , wherein the active DC output control circuit comprises a NV (non-volatile) memory to maintain the desired output voltage settings.

10. The system of claim 9 , wherein the active DC output control circuit comprises:

a control logic, coupled to the NV memory;

an input voltage sensing and signal conditioning circuit for receiving a V+ signal and a V− signal; and

a comparator, coupled to the input voltage sensing and signal conditioning circuit for comparing a reference voltage and the V+ signal, and generating a comparator output signal.

11. The system of claim 6 , wherein the input voltage sensing and signal conditioning circuit comprises the digital analog converter, an amplifier, and a filter.

12. A method for calibrating a single load, comprising:

measuring an output voltage level from a DC/DC converter having a trim pin;

scaling the output voltage level using a digital analog converter based on a digital scaling factor without the use of analog to digital converter and a digital processor;

comparing the scaled output voltage level with a reference voltage;

adjusting the input signal of the DC/DC converter trim pin for calibrating the output voltage level with respect to the reference voltage.

13. The method of claim 12 , further comprising, between the measuring step and the comparing step, adjusting the reference voltage using a level shifter.

14. The method of claim 12 , further comprising, between the measuring step and the comparing step, filtering the output voltage level.

15. The method of claim 12 , wherein in the comparing step, if the output voltage level is greater than the reference voltage and the DC/DC converter has a positive polarity, adjusting the first trim pin slightly downward to decrease the output voltage level.

16. The method of claim 12 , wherein in the comparing step, if the output voltage level is less than the reference voltage and the DC/DC converter has a positive polarity, adjusting the first trim pin slightly upward to increase the output voltage level.

17. The method of claim 12 , wherein in the comparing step, if the output voltage level is greater than the reference voltage and the DC/DC converter has a negative polarity, adjusting the first trim pin slightly upward to decrease the output voltage level.

18. The method of claim 12 , wherein in the comparing step, if the output voltage level is less than the reference voltage and the DC/DC converter has a negative polarity, adjusting the first trim pin slightly downward to increase the output voltage level.

19. The method of claim 12 , wherein the input signal of the DC/DC converter trim pin comprises a voltage signal.

20. The method of claim 12 , wherein the input signal of the DC/DC converter trim pin comprises an electrical current signal.

21. A method for calibrating multiple loads, comprising:

measuring a first output voltage level from a first of N DC/DC converters having a first of N trim pins;

scaling the first output voltage level using a digital analog converter based on a digital scaling factor without the use of analog to digital converter and a digital processor;

comparing the scaled first output voltage level with a reference voltage;

adjusting the input signal of the first of N trim pins on the first of N DC/DC converters to calibrate the first output voltage level with respect to the reference voltage;

repeating the process for each of N DC/DC converters.

22. The method of claim 21 , further comprising:

measuring a second output voltage level from a second of N DC/DC converters;

comparing the second output voltage level with a second reference voltage;

adjusting a first trim pin to calibrate the first output voltage level with respect to the second reference voltage.

23. The method of claim 21 , further comprising, between the measuring step and the comparing step, scaling the each first output voltage level.

24. The method of claim 21 , further comprising, between the measuring step and the comparing step, filtering the first output voltage level.

25. The method of claim 21 , wherein in the comparing step, if the first output voltage level is greater than the first reference voltage and the DC/DC converter has a positive polarity, adjusting the first trim pin slightly downward to decrease the first output voltage level.

26. The method of claim 21 , wherein in the comparing step, if the first output voltage level is less than the first reference voltage and the DC/DC converter has a positive polarity, adjusting the first trim pin slightly upward to increase the first output voltage level.

27. The method of claim 21 , wherein in the comparing step, if the output voltage level is greater than the reference voltage and the DC/DC converter has a negative polarity, adjusting the first trim pin slightly upward to decrease the output voltage level.

28. The method of claim 21 , wherein in the comparing step, if the first output voltage level is less than the first reference voltage and the DC/DC converter has a negative polarity, adjusting the first trim pin slightly downward to increase the first output voltage level.

29. The method of claim 21 , wherein in the comparing step, if the second output voltage level is greater than the second reference voltage and the first of N DC/DC converters has a positive polarity, adjusting the second trim pin slightly downward to decrease the second output voltage level.

30. The method of claim 21 , wherein in the comparing step, if the second output voltage level is less than the second reference voltage and the second of N DC/DC converters has a positive polarity, adjusting the second trim pin slightly upward to increase the second output voltage level.

31. The method of claim 21 , wherein in the comparing step, if the second output voltage level is greater than the second reference voltage and the second of N DC/DC converters has a negative polarity, adjusting the second trim pin slightly upward to decrease the second output voltage level.

32. The method of claim 21 , wherein in the comparing step, if the second output voltage level is less than the second reference voltage and the second of N DC/DC converters has a negative polarity, adjusting the second trim pin slightly downward to increase the second output voltage level.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2013
From: MYERS, THEODORE MARTIN; ADKINS, KENNETH C.; TABLER, JOHN; KAPLISH, ANURAG; O'BRIEN, THOMAS J.
To: SUMMIT MICROELECTRONICS, INC.
Reel/Frame 029771/0117 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2012
From: SUMMIT MICROELECTRONICS, INC.
To: QUALCOMM INCORPORATED
Reel/Frame 029212/0488 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2012
From: MARTIN MEYERS, THEODORE
To: SUMMIT MICROELECTRONICS, INC.
Reel/Frame 028390/0889 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2002
From: MEYERS, THEODORE MARTIN
To: SUMMIT MICROELECTRONICS, INC.
Reel/Frame 013512/0096 →