IP Library Granted Patent US 7,107,036
Granted Patent B1
US 7,107,036 · App. 10/295,662 · Granted Sep 12, 2006

Demodulator architecture and associated methods

Assignee: Cypress Semiconductor Corporation
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Quick Facts
Patent No.
US 7,107,036
App. No.
10/295,662
Granted
Sep 12, 2006
Kind
B1
Abstract

Embodiments of a frequency modulated (FM) demodulator and associated methods are generally described. According to but one example embodiment, an apparatus is disclosed comprising a receiver front-end, to receive a signal from one or more antenna(e) and generate quadrature components of the received signal, and a frequency-shifted, cross-multiplied differentiator demodulator, coupled with the receiver front-end, to generate a demodulated representation of the received signal centered at a select intermediate frequency.

Claims (53)

1. An apparatus comprising:

a receiver front-end, to receive a signal from one or more antenna and generate quadrature components of the received signal; and

a frequency-shifted, cross-multiplied differentiator demodulator having a non-zero center frequency, coupled with the receiver front-end, to generate a demodulated representation of the received signal centered at a select intermediate frequency.

2. An apparatus according to claim 1 , the demodulator comprising:

two parallel processing paths, one each for an in-phase and quadrature representation of the received signal, each path including,

a differentiator, to generate a differential of the in-phase or quadrature component of the received signal, respectively; and

a mixer, coupled with the differentiator, to mix the in-phase or quadrature component of the received signal with the quadrature or in-phase representation of the received signal, respectively.

3. An apparatus according to claim 1 , the receiver front-end comprising:

one or more antenna, to receive wireless signals; and

a quadrature downconverter, to generate an in-phase representation of the received signals and a quadrature representation of the received signals at a select intermediate frequency (IF).

4. An apparatus according to claim 3 , the quadrature downconverter comprising:

two processing paths, one each coupled to the one or more antenna, each processing path including,

a mixer, coupled to the antenna, to mix the received signal with a reference signal to downconvert the received signal to the select intermediate frequency, wherein the reference signal applied to the quadrature representation of the received signal is phase shifted from that applied to the in-phase representation of the received signal.

5. An apparatus according to claim 4 , each path of the quadrature downconverter further comprising:

a filter element, to filter out unwanted signal elements from the downconverted signal; and

an amplifier element, to increase a signal strength of the downconverted signal prior to demodulation of the signal.

6. An apparatus according to claim 1 , wherein the select intermediate frequency lies between a baseband and a carrier frequency of the received signal.

7. An apparatus according to claim 1 , wherein the select intermediate frequency is a baseband frequency.

8. An apparatus according to claim 1 , wherein the apparatus is implemented within a single integrated circuit (IC).

9. A wireless communication device comprising:

one or more antenna; and

an apparatus according to claim 1 .

10. An apparatus, comprising:

a receiver front-end, to receive a signal from one or more antenna and generate quadrature components of the received signal; and

a frequency-shifted, cross-multiplied differentiator demodulator, coupled with the receiver front-end, to generate a demodulated representation of the received signal centered at a select intermediate frequency, the demodulator comprising:

two parallel processing circuits, one each for an in-phase and quadrature representation of the received signal, each circuit including,

a differentiator to generate a differential of the in-phase or quadrature component of the received signal, respectively,

a mixer coupled to the differentiator to mix the in-phase or quadrature component of the received signal with the quadrature or in-phase representation of the received signal, respectively, and

a frequency shifting network coupled to the differentiator, the frequency shifting network comprising passive electronic elements, wherein values of the passive electronic elements are associated with a crossing point of the differentiator.

11. An apparatus according to claim 10 , wherein the passive electronic elements comprise:

a resistor-capacitor filter element having one or more resistors and one or more capacitors.

12. An apparatus according to claim 10 , the demodulator further comprising:

a summing module, coupled with each of the two parallel processing circuits, to subtract a result of the in-phase processing circuit from a result of the quadrature processing circuit.

13. A method comprising:

receiving a frequency modulated (FM) signal; and

generating a frequency shifted differential of each of an in-phase and quadrature representation of the received FM signal which, when selectively combined, reveals a modulating signal of the received FM signal, wherein generating the frequency shifted differential of each of the in-phase and quadrature representation of the received FM signal comprises shifting a center frequency of a differentiator generating the differential to a select non-zero intermediate frequency (IF).

14. A method according to claim 13 , the method further comprising:

splitting the received signal into two processing branches, an in-phase branch and a quadrature branch; and

mixing the signal in the in-phase branch with a reference signal, and the signal in the quadrature branch with a phase-shifted representation of the reference signal.

15. A method according to claim 14 , wherein the reference signal is associated with the select IF.

16. A method according to claim 13 , wherein generating the frequency shifted differential further comprises:

computing a differential of each of the in-phase and quadrature representation of the received FM signal; and

multiplying the computed differential of the in-phase and quadrature representation of the received FM signal with the quadrature and in-phase representation of the received FM signal, respectively.

17. A method according to claim 16 , further comprising:

subtracting a product of the quadrature differential from a product of the in-phase differential to produce a demodulated representation of the received FM signal.

18. A storage medium comprising content which, when executed, causes an accessing machine to implement a method according to claim 13 .

19. An apparatus comprising:

a differentiator to generate a differential of a component of a received signal; and

a frequency shifting network coupled to the differentiator, the frequency shifting network comprising one or more passive electronic elements, wherein values of the one or more passive electronic elements are associated with a crossing point of the differentiator and a second differentiator of a processing circuit.

20. The apparatus of claim 19 , wherein the one or more passive electronic elements comprise a resistor-capacitor filter element.

21. The apparatus of claim 19 , wherein the processing circuit is a quadrature processing circuit.

22. The apparatus of claim 21 , further comprising:

a mixer coupled to the differentiator to mix the component of the received signal with a quadrature component of the received signal from the quadrature processing circuit, wherein the component of the received signal comprises an in-phase component of the received signal.

Assignments (6)
MERGER Recorded Jun 30, 2026
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES AMERICAS CORP.
Reel/Frame 075140/0826 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 12, 2025
From: GEHRING, MARK R.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 071396/0600 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: SPANSION LLC; CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
Continuity (1)
Continuation 1028089100 · Oct 24, 2002