Class AB analog inverter
View Patent ↗A class AB analog inverter comprising cascoded n-channel (NMOS) and p-channel (PMOS) transistors. The inverter uses complementary devices, of which one or more may be a first transistor in cascode with a second transistor. The first and second transistors may have the same threshold voltage (V T ), or may have different threshold voltages. The class AB inverter provides improved slew rate and low power capabilities for use in mixed-signal integrated circuits such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and active filters.
1. A complementary metal-oxide semiconductor (CMOS) class AB analog inverter circuit comprising:
a first CMOS device;
a second CMOS device comprising a source coupled to a source of said first CMOS device, and a gate coupled to a gate of said first CMOS device;
a third CMOS device comprising a drain coupled to a drain and a gate of said first CMOS device;
a fourth CMOS device comprising a drain coupled to a drain of said second CMOS device, a gate coupled to a source of said third CMOS device; and
a fifth CMOS device comprising a source coupled to a source of said third CMOS device and a drain coupled to a source of said fourth CMOS device.
2. The inverter circuit of claim 1 , wherein the first, second, and fifth CMOS devices are p-channel metal-oxide semiconductor (PMOS) devices, and the third and fourth CMOS devices are n-channel metal-oxide semiconductor (NMOS) devices.
3. The inverter circuit of claim 1 , wherein the first, second, and fifth CMOS devices are NMOS devices, and the third and fourth CMOS devices are PMOS devices.
4. The inverter circuit of claim 1 , wherein at least one of the CMOS devices is a composite threshold voltage (V T ) cascode circuit.
5. The inverter circuit of claim 1 , wherein at least two of the CMOS devices are composite V T cascode circuits.
6. The inverter circuit of claim 1 , wherein at least three of the CMOS devices are composite V T cascode circuits.
7. The inverter circuit of claim 1 , wherein at least four of the CMOS devices are composite V T cascode circuits.
8. The inverter circuit of claim 7 , wherein said fifth CMOS device is a low V T transistor.
9. A complementary metal-oxide semiconductor (CMOS) comprising:
a class AB analog inverter circuit comprising:
a first CMOS device;
a second CMOS device comprising a source coupled to a source of said first CMOS device and a gate coupled to a gate of said first CMOS device;
a third CMOS device comprising a drain coupled to a drain and a gate of said first CMOS device;
a fourth CMOS device comprising a drain coupled to a drain of said second CMOS device; and
a fifth CMOS device comprising a source coupled to a source of said third CMOS device, a drain coupled to a source of said fourth CMOS device, and a gate coupled to a gate of said fourth CMOS device, wherein at least one of the CMOS devices is a composite V T cascode circuit.
10. The inverter circuit of claim 9 , wherein at least two of the CMOS devices are composite V T cascode circuits.
11. The inverter circuit of claim 9 , wherein at least three of the CMOS devices are composite V T cascode circuits.
12. The inverter circuit of claim 9 , wherein at least four of the CMOS devices are composite V T cascode circuits.
13. The inverter circuit of claim 12 , wherein said fifth CMOS device is a low V T transistor.
14. A mixed-signal integrated circuit comprising:
a class AB analog inverter, wherein said class AB analog inverter comprises:
a normal V T p-channel transistor in cascode with a low V T p-channel transistor; and
a normal V T n-channel transistor in cascode with a low V T n-channel transistor.
15. The integrated circuit of claim 14 , wherein said mixed-signal integrated circuit is an analog-to-digital converter (ADC).
16. The integrated circuit of claim 14 , wherein said mixed-signal integrated circuit is a digital-to-analog converter (DAC).
17. The integrated circuit of claim 14 , wherein said mixed-signal integrated circuit is an active filter.