IP Library Granted Patent US 6,894,565
Granted Patent B1
US 6,894,565 · App. 10/308,765 · Granted May 17, 2005

Fast settling power amplifier regulator

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Quick Facts
Patent No.
US 6,894,565
App. No.
10/308,765
Granted
May 17, 2005
Kind
B1
Abstract

A method and apparatus is provided for dynamically changing the biasing conditions of a voltage regulator to overcome the problems caused by various conditions. The invention includes a detector and a bias control circuit for applying bias current to the voltage regulator to compensate for a detected condition.

Claims (75)

1. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a detector circuit coupled to a regulator and to a control signal that is generated to control the output power of the power amplifier, wherein the detector circuit detects switching transients of the power amplifier;

a bias circuit coupled to the regulator for applying a signal to decrease the settling time of the regulator during a detected switching transient; and

a timer circuit coupled to the bias circuit and the detector circuit for controlling when the signal is applied to the regulator.

2. The circuit of claim 1 , wherein the timer is a pulse generator.

3. The circuit of claim 1 , wherein the timer is a 1-shot, timer.

4. The circuit of claim 1 , wherein the detector detects when a voltage level of the control signal drops.

5. The circuit of claim 1 , wherein the detector is comprised of a slew detector.

6. The circuit of claim 1 , wherein the bias circuit decreases the settling time of the regulator by applying a bias current to the regulator.

7. The circuit of claim 1 , wherein the circuit decreases the settling time of the regulator by applying a bias voltage to the regulator.

8. The circuit of claim 1 , further comprising a second regulator, wherein the circuit decreases the settling time of the regulator by selectively using the first and second regulators.

9. The circuit of claim 1 , further comprising a switching device coupled to the detector, wherein the bias circuit decreases the settling time of the regulator by turning on the switching device in response to a detected condition.

10. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a regulator;

a detector for detecting a condition relating to the operation of the regulator;

control circuitry coupled to the regulator for decreasing the settling time of the regulator in response to a detected condition; and

a timer coupled to the detector and the control circuitry for controlling the duration that the control circuitry controls the output power of the regulator in response to a detected condition.

11. The circuit of claim 10 , further comprising delay circuitry for delaying when the control circuitry controls the output power of the regulator in response to a detected condition.

12. The circuit of claim 10 , wherein the output level of the regulator is controlled by a power control signal, and wherein the detector detects a condition relating to the power control signal.

13. The circuit of claim 12 , wherein the detector detects when the power control signal level drops.

14. The circuit of claim 10 , wherein the control circuitry varies the speed at which the regulator is able to respond to a detected condition.

15. The circuit of claim 14 , wherein the regulator is dynamically biased in response to a detected condition.

16. The circuit of claim 10 , wherein the control circuitry varies how the regulator controls the output power of the power amplifier in response to a detected condition.

17. The circuit of claim 16 , further comprising switching circuitry for selectively activating two or more regulators in response to a detected condition.

18. The circuit of claim 10 , wherein the regulator is a voltage regulator.

19. The circuit of claim 10 , wherein the regulator is a current regulator.

20. A method of controlling a regulator comprising the steps of:

detecting a condition relating to the operation of the regulator;

in response to a detected condition, applying a signal to decrease the settling time of the regulator; and

applying the signal to the regulator for a predetermined amount of time.

21. The method of claim 20 , wherein the signal is a bias voltage.

22. The method of claim 20 , wherein the signal is a bias current.

23. The method of claim 20 , further comprising the step of providing a power control signal to control the output power of the regulator, wherein the detector detects a condition relating to the power control signal.

24. The method of claim 23 , wherein the detector detects when the power control signal level drops.

25. A method of controlling a regulator used with a power amplifier comprising the steps of:

providing first and second regulators for providing power to the power amplifier;

detecting a condition relating to the operation of the regulators;

in response to a detected condition, using any combination of the first and second regulators to provide power to the power amplifier.

26. The method of claim 25 , wherein the step of detecting a condition further comprises the step of determining when a power control signal drops.

27. The method of claim 25 , further comprising the step of providing a timer for controlling the duration that the second regulator provides power to the power amplifier.

28. The method of claim 25 , further comprising the step of providing switching circuitry for controlling when the first and second regulators provide power to the power amplifier.

29. The method of claim 25 , wherein the first and second regulators are voltage regulators.

30. The method of claim 25 , wherein the first and second regulators are current regulators.

31. The method of claim 25 , wherein the first regulator is a current regulator and the second regulator is a voltage regulator.

32. A method of controlling a regulator for a power amplifier comprising the steps of:

providing a regulator;

providing current to the regulator to power the power amplifier;

selectively applying a signal to the regulator to control the settling time of the regulator; and

providing a timer for controlling the duration of the applied control signal.

33. The method of claim 32 , further comprising the steps of detecting one or more conditions relating to the operation of the regulator and selectively applying bias current to vary the settling time based on the detected conditions.

34. The method of claim 32 , wherein the regulator is a voltage regulator.

35. The method of claim 34 , wherein the signal is comprised of a bias voltage.

36. The method of claim 32 , wherein the regulator is a current regulator.

37. The method of claim 36 , wherein the signal is comprised of a bias current.

38. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a regulator;

a detector for detecting a condition relating to a power amplifier control signal;

control circuitry coupled to the regulator for controlling the settling time of the regulator in response to a detected condition; and

a timer coupled to the detector and the control circuitry for controlling the duration that the control circuitry controls the settling time of the regulator in response to a detected condition.

39. The circuit of claim 38 , further comprising delay circuitry for delaying when the control circuitry controls the settling time of the regulator in response to a detected condition.

40. The circuit of claim 38 , wherein the detector detects when the power amplifier control signal level drops.

41. The circuit of claim 38 , wherein the regulator is a voltage regulator.

42. The circuit of claim 38 , wherein the regulator is a current regulator .

43. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a detector circuit coupled to a regulator and to a control signal that is generated to control the output power of the power amplifier, wherein the detector circuit detects switching transients of the power amplifier;

a bias circuit coupled to the regulator for applying a signal to decrease the settling time of the regulator during a detected switching transient; and

a second regulator, wherein the circuit decreases the settling time of the regulator by selectively using the first and second regulators.

44. The circuit of claim 43 , wherein the detector detects when a voltage level of the control signal drops.

45. The circuit of claim 43 , wherein the detector is comprised of a slew detector.

46. A circuit for regulating the output power of a power amplifier during a switching transient comprising:

a regulator;

a detector for detecting a condition relating to the operation of the regulator;

control circuitry coupled to the regulator for decreasing the settling time of the regulator in response to a detected condition; and

switching circuitry for selectively activating two or more regulators in response to a detected condition.

47. The circuit of claim 46 , wherein the control circuitry varies how the regulator controls the output power of the power amplifier in response to a detected condition.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2014
From: BLACK SAND TECHNOLOGIES, INC.
To: QUALCOMM INCORPORATED
Reel/Frame 034077/0072 →
RELEASE OF SECURITY INTEREST Recorded Sep 12, 2014
From: SILICON LABORATORIES INC.
To: BLACK SAND TECHNOLOGIES INC.
Reel/Frame 033729/0183 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2014
From: SILICON LABORATORIES INC.
To: BLACK SAND TECHNOLOGIES, INC.
Reel/Frame 033500/0122 →
RELEASE OF SECURITY INTEREST Recorded Jun 30, 2014
From: COMERICA BANK
To: BLACK SAND TECHNOLOGIES, INC.
Reel/Frame 033258/0225 →
MERGER Recorded Jun 27, 2014
From: WAVEFORM ACQUISITION CORPORATION
To: BLACK SAND TECHNOLOGIES, INC.
Reel/Frame 033247/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2014
From: BOCOCK, RYAN M.; DUPUIS, TIMOTHY J.
To: SILICON LABORATORIES, INC.
Reel/Frame 032916/0276 →
SECURITY AGREEMENT Recorded Jul 14, 2009
From: BLACK SAND TECHNOLOGIES, INC.
To: SILICON LABORATORIES INC.
Reel/Frame 022951/0423 →
SECURITY AGREEMENT Recorded Mar 5, 2009
From: BLACK SAND TECHNOLOGIES, INC.
To: COMERICA BANK
Reel/Frame 022343/0475 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 16, 2008
From: SILICON LABORATORIES INC.
To: BLACK SAND TECHNOLOGIES, INC.
Reel/Frame 021243/0389 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2002
From: BOCOCK, RYAN M.; DUPUIS, TIMOTHY J.
To: SILICON LABORATORIES, INC.
Reel/Frame 013550/0233 →