Thin-film transistor and method of manufacture thereof
View Patent ↗A thin-film transistor is provided which prevents the degradation of transistor characteristics due to ion channeling. A thin-film transistor ( 10 ) includes thin crystalline silicon ( 2 ) including source and drain regions ( 2 a ) and a channel region ( 2 b ), which are formed on a substrate ( 1 ); a gate insulator ( 3 ) formed on the crystalline silicon ( 2 ); and a gate electrode ( 4 ) formed on the gate insulator ( 3 ). The gate electrode ( 4 ) includes an amorphous layer ( 5 ) and a crystalline layer ( 6 ).
1. A method of manufacturing a thin film transistor, comprising:
a step of forming a crystallized silicon film for source and drain regions on a substrate;
a step of forming an amorphous gate insulating film on the crystallized silicon film; and
a step of forming a gate electrode on the amorphous gate insulating film,
wherein the step of forming the gate electrode includes a step of forming an amorphous layer and a crystalline layer as constituent elements of the gate electrode, and the amorphous layer and the crystalline layer are formed in this order continuously under a predetermined condition.
2. A method of manufacturing a thin film transistor according to claim 1 , wherein the amorphous layer and the crystalline layer are formed by a plasma CVD method.
3. A method of manufacturing a thin film transistor according to claim 1 , wherein a laser beam is irradiated after the amorphous layer and the crystalline layer are formed.
4. A method of manufacturing a thin film transistor, comprising:
a step of forming a crystallized silicon film for source and drain regions on a substrate;
a step of forming an amorphous gate insulating film on the crystallized silicon film; and
a step of forming a gate electrode on the amorphous gate insulating film,
wherein the step of forming the gate electrode includes a step of forming a silicon thin film as a constituent element of the gate electrode, the silicon thin film being formed continuously under a predetermined condition, and forming time of the silicon thin film is controlled so that a portion of the amorphous gate insulating film side of the silicon thin film is formed as an amorphous layer and an opposite portion of the silicon thin film to the amorphous gate insulating film side is formed as a crystalline layer.
5. A method of manufacturing a thin film transistor according to claim 4 , wherein annealing at not lower than 300° C. is performed after the silicon thin film is formed, and, thereafter, a hydrogen introducing process is performed.
6. A method of manufacturing a thin film transistor according to claim 4 , wherein after the silicon thin film is patterned, the source and drain regions are formed by using the silicon thin film as a mask, and, thereafter, a laser beam is irradiated.
7. The method of claim 1 , wherein the predetermined condition includes a substrate temperature, gas flow rate, gas pressure, and RE power concentration that do not change during the step of forming the amorphous layer and the crystalline layer.
8. The method of claim 1 , wherein the step of forming the amorphous layer and the crystalline layer includes the step of controlling a time during which the predetermined condition does not change and during which the amorphous and crystalline layers are formed.
9. The method of claim 4 , wherein the predetermined condition includes a substrate temperature, gas flow rate, gas pressure, and RF power concentration that do not change during the step of forming the silicon thin film.
10. The method of claim 4 , wherein the step of forming the silicon thin film layer includes the step of controlling a time during which the predetermined condition does not change and during which the amorphous and crystalline layers are formed.
11. A thin film transistor, comprising:
a crystallized silicon film having source and drain regions and a channel region which are formed on a substrate;
an amorphous gate insulating film formed on the crystallized silicon film; and
a gate electrode formed on the gate insulating film and containing a silicon thin film,
wherein the silicon thin film consists of one lower layer formed on the amorphous gate insulating film and one upper layer formed on the lower layer, the lower layer being an amorphous layer and the upper layer being a crystalline layer containing a crystalline silicon component and an amorphous silicon component.
12. A thin film transistor according to claim 11 , wherein the lower layer and the upper layer are doped with one of phosphorous ions, arsenic ions and boron ions.
13. A thin film transistor according to claim 11 , wherein the gate electrode comprises a gate metal formed on the silicon thin film.
14. A thin film transistor according to claim 13 , wherein the gate metal comprises metal silicide.
15. A thin film transistor according to claim 11 , wherein the crystalline silicon component increases in amount as a distance from the lower layer increases.
16. A thin film transistor, comprising:
a crystallized silicon film having source and drain regions and a channel region which are formed on a substrate;
an amorphous gate insulating film formed on the crystallized silicon film; and
a gate electrode formed on the gate insulating film and containing a silicon thin film,
wherein the silicon thin film consists of one lower layer formed on the amorphous gate insulating film and one upper layer formed on the lower layer, the lower layer being an amorphous layer and the upper layer being a crystalline layer containing a crystalline silicon component which increases in amount as a distance from the lower layer increases.
17. A thin film transistor according to claim 16 , wherein the lower layer and the upper layer are doped with one of phosphorous ions, arsenic ions and boron ions.
18. A thin film transistor according to claim 16 , wherein the gate electrode comprises a gate metal formed on the silicon thin film.
19. A thin film transistor according to claim 18 , wherein the gate metal comprises metal silicide.