System and method for reducing second order distortion in electronic circuits
View Patent ↗System and methods for reducing the effects of imbalance between input signals in a gain controlled differential amplifier are shown. Distortion in the amplifier is reduced by modulating the gain control input based upon detected differences between the signal levels of the differential input signal source.
1. Circuitry for mitigating the effects of an imbalanced input, said circuitry comprising:
sensing circuitry for providing at least one control signal, said control signal proportional to a sensed imbalance of said input; and
circuitry for combining said control signal with an adjustment signal, said adjustment signal operative for modifying, at least in part, further processing of said input signal as a function of said sensed imbalance.
2. The circuitry of claim 1 wherein said adjustment signal is a DC signal.
3. The circuitry of claim 2 wherein said control signal is an AC signal.
4. The circuitry of claim 3 wherein said adjustment and control signals are voltage signals.
5. The circuitry of claim 1 wherein said adjustment signal comprises a gain adjustment signal.
6. The circuitry of claim 1 wherein said adjustment and control signals are applied to a gate of a FET device in order to reduce the modulation of the resistance used for said modifying of said further processing.
7. The circuitry of claim 1 wherein said further processing includes providing said imbalanced input to a differential amplifier.
8. The circuitry of claim 7 wherein said mitigating the effects of said imbalanced input by said circuitry reduces second order distortion in said differential amplifier.
9. The circuitry of claim 1 wherein said mitigating the effects of said imbalanced input by said circuitry reduces second order distortion in said further processing.
10. The circuitry of claim 1 wherein said imbalanced input is applied to an input of a variable gain differential amplifier having its gain controlled by resistive changes, which resistive changes are controlled by said adjustment signal.
11. The circuitry of claim 10 wherein said sensed imbalance is within said amplifier circuit.
12. The circuitry of claim 10 wherein said sensed imbalance is external to said amplifier circuit.
13. The circuitry of claim 1 wherein said imbalanced input arrives as a single signal and wherein a second signal is derived from said single signal thereby providing a pair of unbalanced signals.
14. A differential amplifier adapted to mitigate second order distortion, said amplifier comprising:
circuitry for controlling at least one operational aspect of said amplifier in response to received adjustment signals; and
circuitry for modifying said received adjustment signals based upon detected signal level differences between input signals to said differential amplifier.
15. The amplifier of claim 14 wherein said operational aspect of said amplifier comprises a gain of said amplifier.
16. The amplifier of claim 14 wherein said input signals are derived from a single-ended signal.
17. The amplifier of claim 14 wherein said input signals are differential signals.
18. The amplifier of claim 14 wherein said input signals are applied to the bases of bipolar transistors whose emitter voltages are each controlled, at least in part, by variable resistance values established by said operational aspect control circuitry.
19. The amplifier of claim 18 wherein said detected signal level difference is established by comparison of the AC voltage level difference between said input signals.
20. The amplifier of claim 19 wherein said received adjustment signal is a DC control voltage and wherein said comparison of AC voltage levels result in an AC error voltage, and wherein said modifying includes mixing said AC error voltage with said DC control voltage while isolating said DC control voltage from said input signals.
21. The amplifier of claim 20 wherein said input signal is a single-ended signal.
22. The amplifier of claim 20 wherein said modifying circuit includes resistive values connected to said input signals, said resistive values having a midpoint from which said AC error signal is obtained.
23. The amplifier of claim 22 further comprising proportionally reducing said error signal to a fraction of said voltage obtained from said resistive mid-point.
24. A system for reducing the effect on an electronic circuit caused by imbalances between input signals to said electronic circuit, said system comprising:
means for continuously sensing said imbalances and for providing an imbalance signal proportional to said sensed imbalance; and
means for adding said imbalance signal to a control signal utilized to control an operational aspect of said electronic circuit.
25. The system of claim 24 , wherein said operational aspect comprises a gain of said electronic circuit.
26. The system of claim 24 wherein said electronic circuit comprises a differential gain-controlled amplifier, wherein said input signals are provided as input signals to said amplifier, and wherein said control signal comprises a gain control input of said amplifier.
27. The system of claim 26 wherein said gain control input is connected to a pair of transistors acting as variable resistors within said gain-controlled amplifier.
28. The system of claim 27 wherein said sensing means comprises an impedance bridge across said input signals.
29. The system of claim 27 wherein said imbalance signal comprises an AC signal and wherein said control signal comprises a DC signal.
30. A method for reducing the effect on an electronic circuit caused by imbalances between input signals to said electronic circuit, said method comprising:
continuously sensing said imbalances;
providing an imbalance signal proportional to said sensed imbalance; and
adding said imbalance signal to a control signal utilized to control an operational aspect of said electronic circuit.
31. The method of claim 30 wherein said operational aspect comprises a gain of said electronic circuit.
32. The method of claim 30 wherein said electronic circuit comprises a differential gain-controlled amplifier, wherein said input signals are provided as input signals to said amplifier, and wherein said control signal comprises a gain control input of said amplifier.
33. The method of claim 32 wherein said gain control input is connected to a pair of transistors acting as variable resistors within said gain control circuit.
34. The method of claim 33 wherein said sensing means is an impedance bridge across said input signals.
35. The method of claim 33 wherein said sensing imbalance signals are AC signals and wherein said gain control signals are DC signals.
36. A method for controlling a differential amplifier, said method comprising:
controlling an operational aspect of said amplifier in response to received adjustment signals; and
modifying said received adjustment signals based upon detected signal level differences between input signals to said differential amplifier.
37. The method of claim 36 wherein said input signals are derived from a single-ended signal.
38. The method of claim 36 wherein said input signals are differential signals.
39. The method of claim 36 wherein said input signals are applied to the bases of transistors whose emitter voltages are each controlled by said received adjustment signals.
40. The method of claim 39 wherein said detected signal level difference is established by comparison of the AC voltage level difference between said input signals.
41. The method of claim 40 wherein said received adjustment signal is a DC control voltage and said comparison of AC voltage levels result in an AC error voltage, and wherein said modifying includes mixing said AC error voltage with said DC control voltage while isolating said DC control voltage from said input signals.
42. The method of claim 41 wherein said modifying circuit includes resistive values connected to said input signals, said resistive values having a midpoint from which said AC error signal is obtained.
43. The method of claim 42 further comprising proportionally reducing said error signal to a fraction of said voltage obtained from said resistive mid-point.
44. The method of claim 36 wherein said operational aspect comprises a gain of said amplifier.
45. A method for mitigating effects of imbalanced input signals, said method comprising:
providing at least one control signal, said control signal proportional to a sensed imbalance between said input signals; and
combining said control signal with an adjustment signal, said adjustment signal operative for modifying, at least in part, further processing of said input signals.
46. The method of claim 45 wherein said adjustment signal is a DC signal.
47. The method of claim 46 wherein said control signal is an AC signal.
48. The method of claim 47 wherein said adjustment and control signals are applied to a gate of a FET device in order to reduce the modulation of the resistance used for said modifying of said further processing.
49. The method of claim 48 wherein said further processing includes providing said unbalanced input signals to a differential amplifier.
50. The method of claim 49 wherein said mitigation of effects of said imbalanced input signals reduces second order distortion in said differential amplifier.
51. The method of claim 45 wherein said mitigation of effects of said imbalanced input signals reduces second order distortion in said further processing.
52. The method of claim 45 wherein said imbalanced input signals are each applied to an input of a variable gain differential amplifier having its gain controlled by resistive changes, which resistive changes are controlled by said adjustment signal.
53. The method of claim 52 wherein said sensed imbalance is within said amplifier circuit.
54. The method of claim 52 wherein said sensed imbalance is external to said amplifier circuit.
55. The method of claim 45 wherein said unbalanced signal arrives as a single signal and wherein a second is derived from said single signal thereby providing said unbalanced signals.
56. Circuitry for mitigating distortion associated with input signals which arrive unbalanced at a differential amplifier, said circuitry comprising:
means for providing at least one control signal, said control signal proportional to a sensed imbalance between said input signals; and
means for combining said control signal with a gain adjustment signal, said gain adjustment signal operative for modifying, at least in part, further processing of said input signals.
57. The circuitry of claim 56 wherein said gain adjustment signal is a DC signal.
58. The circuitry of claim 57 wherein said control signal is an AC signal.
59. The circuitry of claim 56 wherein said adjustment and control signals are applied to a gate of a FET device in order to reduce the modulation of the resistance used for said modifying of said further processing.
60. The circuitry of claim 56 wherein said further processing includes means for providing said unbalanced input signals to a differential amplifier.
61. The circuitry of claim 60 wherein said mitigating distortion associated with said input signals reduces second order distortion in said differential amplifier.
62. The circuitry of claim 56 wherein said mitigating distortion associated with said input signals reduces second order distortion in said further processing.
63. The circuitry of claim 56 wherein said unbalanced input signals arc each applied to an input of a variable gain differential amplifier having its gain controlled by resistive changes, which resistive changes are controlled by said gain adjustment signal.
64. The circuitry of claim 63 wherein said sensed unbalance is within said amplifier circuit.
65. The circuitry of claim 63 wherein said sensed unbalance is external to said amplifier circuit.
66. The circuitry of claim 56 wherein said unbalanced signal arrives as a single signal and wherein said circuitry includes means for deriving a second signal from said single signal thereby providing said unbalanced signals.