Granted Patent B2

US 7,057,469 · App. 10/321,116 · Granted Jun 6, 2006

Abstract

Claims (63)

1. A differential negative resistance generator for providing negative resistance to a differential resonator of a differential voltage controlled oscillator (VCO), comprising:

first and second active devices, each having first and second current terminals and a control terminal;

first and second current sinks, each coupled to a corresponding one of said second current terminals of said first and second active devices; and

a capacitive degeneration circuit coupled to said first and second active devices and operative to cancel at least a portion of extra capacitance of the differential negative resistance generator applied to the differential resonator, the capacitive degeneration circuit including at least one capacitive device coupled between said second current terminals of said first and second active devices that has a capacitance value selected so that the negative resistance generator has only negative resistance and the reactive component of impedance is eliminated, and further comprising first and second current sinks, each coupled to an emitter of a respective one of said first and second active devices, wherein said firs and second current sinks each comprises:

a current sink transistor having an emitter, a collector coupled to an emitter of a respective one of said first and second active devices, and a base coupled to a bias voltage.

2. The differential negative resistance generator of claim 1 , further comprising:

a first capacitor coupled between said control terminal of said first active device and said first current terminal of said second active device; and

a second capacitor coupled between said control terminal of said second active device and said first current terminal of said first active device.

3. The differential negative resistance generator of claim 1 , further comprising a bias circuit coupled to said control terminals of said first and second active devices.

4. The differential negative resistance generator of claim 3 , wherein said bias circuit comprises:

a first resistor coupled between said control terminal of said first active device and a bias voltage; and

a second resistor coupled between said control terminal of said second active device and said bias voltage.

5. The differential negative resistance generator of claim 1 , wherein said at least one capacitive device comprises at least one capacitor.

6. The differential negative resistance generator of claim 1 , wherein said at least one capacitive device comprises first and second capacitors coupled in series between said second current terminals of said first and second active devices.

7. The differential negative resistance generator of claim 1 , wherein said first and second active devices comprise bipolar junction transistors in which said first current terminals are collector terminals, and the second current terminals are emitter terminals, and said control terminals are base terminals.

8. The differential negative resistance generator of claim 1 , wherein said first and second active devices comprise MOSFETs in which said control terminals are gate terminals.

9. The differential negative resistance generator of claim 1 , further comprising first and second capacitors, each coupled between said first and second current terminals of a respective one of said first and second active devices.

10. The differential negative resistance generator of claim 1 , further comprising first and second capacitors, each coupled between said control terminal and second current terminal of a respective one of said first and second active devices.

11. A differential negative resistance voltage controlled oscillator (VCO), comprising:

a resonator having first and second terminals that generate a differential oscillation signal with first and second polarity signals;

first and second capacitors for sampling an oscillation signal to develop a differential Output signal; and

a differential negative resistance source coupled to said resonator, comprising:

first and second transistors, each having a controlled first and a second current path and a control terminal, wherein said control current path of each of said first and second transistors is coupled to a respective one of said first and second polarity signals of said differential oscillation signal; and

a capacitive degeneration circuit including at least one capacitive device coupled to said controlled current paths of first and second transistors that has a capacitance value selected so that the negative resistance source has only negative resistance and the reactive component of impedance is eliminated; and

first and second current sinks, each coupled to a corresponding one of said controlled current paths of said first and second transistors, wherein said first and second current sinks each comprise:

a current sink transistor having an emitter, a collector coupled to an emitter of a respective one of said first and second transistors, and a base coupled to a bias voltage.

12. The differential negative resistance VCO of claim 11 , wherein;

said first transistor comprises a first BJT having a collector coupled to said first polarity of said differential oscillation signal and an emitter coupled to said capacitive degeneration circuit;

said second transistor comprises a second BJT having a collector coupled to said second polarity of said differential oscillation signal and an emitter coupled to said capacitive degeneration circuit;

wherein said capacitive degeneration circuit comprises:

a capacitive network coupled between emitters of said first and second BJTs; and

first and second current sinks, each coupled to an emitter of a respective one of said first and second BJTs.

13. A differential negative resistance voltage controlled oscillator (VCO), comprising:

a resonator having first and second terminals that generate a differential oscillation signal with first and second polarity signals;

a differential negative resistance source coupled to said resonator, comprising:

first and second transistors, each having a controlled current path and a control terminal, wherein said control current path of each of said first and second transistors is coupled to a respective one of said first and second polarity signals of said differential oscillation signal; and

a capacitive degeneration circuit coupled to said controlled current paths of first and second transistors, said capacitive degeneration circuit operative to cancel at least a portion of extra capacitance of said differential negative resistance source applied to said resonator;

wherein said first transistor comprises a first BJT having a collector coupled to said first polarity of said differential oscillation signal and an emitter coupled to said capacitive degeneration circuit;

said second transistor comprises a second BJT having a collector coupled to said second polarity of said differential oscillation signal and an emitter coupled to said capacitive degeneration circuit;

said capacitive degeneration circuit further comprising:

a capacitive network coupled between emitters of said first and second BJTs; and

first and second current sinks, each coupled to an emitter of a respective one of said first and second BJTs;

wherein said first and second current sinks each comprises:

a current sink transistor having an emitter, a collector coupled to an emitter of a respective one of said first and second BJTs and a base coupled to a bias voltage;

a resistor coupled between said emitter of said current sink transistor and ground; and

a capacitor coupled between said base current sink transistor and ground.

14. The differential negative resistance VCO of claim 13 , further comprising:

a first capacitor coupled between a base of said first BJT and a collector of said second BJT; and

a second capacitor coupled between a base of said second BJT and a collector of said first BJT.

15. The differential negative resistance VCO of claim 14 , further comprising a bias circuit that resistively couples said bases of said first and second BJTs to a bias voltage.

16. The differential negative resistance VCO of claim 15 , wherein said resonator comprises an inductor coupled between said first and second polarity signals of said oscillation signal, said inductor having a center tap coupled to a DC supply voltage.

17. The differential negative resistance VCO of claim 13 , further comprising first and second capacitors, each coupled between said collector and said emitter of a respective one of said first and second BJTs.

18. The differential negative resistance VCO of claim 13 , further comprising first and second capacitors, each coupled between said base and said emitter of a respective one of said first and second BJTs.

19. A method of optimizing operation of a differential VCO having a differential resonator with a differential oscillation output, comprising:

coupling a differential output of a differential pair of transistors to the differential oscillation output;

splitting the differential pair of transistors into first and second transistors by disconnecting common current terminals;

coupling a first DC bias current sink to a current terminal of the first transistor and coupling a second DC bias current sink to a current terminal of the second transistor, wherein coupling each of said first and second DC bias current sinks to said first and second transistors respectively comprises coupling an emitter of each of the first and second transistors to a collector of respective current sink transistor and a base of each of the respective current sink transistors to a bias voltage; and

adding at least one capacitor between the current terminals of the first and second transistors to thereby cancel at least a portion of extra capacitance of the differential output applied to the differential resonator, wherein the capacitor has a capacitance value selected so that the differential output has only negative resistance and the reactive component of impedance is eliminated.

20. The method or claim 19 , further comprising:

tuning the at least one capacitor to reduce net differential capacitance applied to the differential resonator.

21. The method of claim 19 , further comprising:

cross-coupling feedback capacitors between said first and second transistors; and

tuning the cross-coupled capacitors and the at least one capacitor to reduce net differential capacitance applied to the differential resonator.

Assignments (10)