IP Library › Granted Patent US 7,061,052
Granted Patent B2
US 7,061,052 · App. 10/323,912 · Granted Jun 13, 2006

Input protection circuit connected to protection circuit power source potential line

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Quick Facts
Patent No.
US 7,061,052
App. No.
10/323,912
Granted
Jun 13, 2006
Kind
B2
Abstract

An input protection circuit capable of precisely bypassing a surge current to a power source terminal and protecting the gate of a protective transistor from an electrostatic surge. The input protection circuit has an input terminal which receives an input signal, a first power source terminal which receives a first power source electric potential, and a first protective power source potential line connected to the first power source terminal for supplying the first power source electric potential to an input protection circuit. The input protection circuit has a first input protection transistor of a first conductive type having a drain connected to the input terminal, a gate and a source connected to the first protective power source potential line. Moreover, the input protection circuit has a second input protection transistor of the first conductive type having a drain connected to an input terminal of an internal circuit, a gate connected to the input terminal via a protective resistor, and a source connected to the first protective power source potential line.

Claims (40)

1. An input protection circuit comprising:

an input terminal which receives an input signal;

a first power source terminal which receives a first power source electric potential;

a second power source terminal which receives a second power source electric potential;

a first power source line connected to said first power source terminal;

a second power source line connected to said second power source terminal;

a first input protective transistor of a first conductive type having a drain, a gate and a source, said drain being connected to said input terminal, and said gate and said source being connected to said first power source line;

a second input protective transistor of a second conductive type having a drain, a gate and a source, said drain being connected to said input terminal, and said gate and said source being connected to said second power source line; and

an inverter including a first transistor and a second transistor, said first transistor having a drain, a gate and a source, said drain being connected to an internal circuit, said gate being connected to the input terminal via a protective resistor, and said source being connected to said first power source line, and said second transistor having a drain, a gate and a source, said drain being connected to the internal circuit, said gate being connected to the input terminal via the protective resistor, and said source being connected to said second power source line,

wherein the source of the first input protective transistor and the source of the first transistor of the inverter are formed in a common region in a first conductive type impurity active region.

2. An input protection circuit as claimed in claim 1 , wherein said protective resistor includes a polycide pattern.

3. An input protection circuit as claimed in claim 1 , wherein said protective resistor includes a diffusion resistor.

4. An input protection circuit as claimed in claim 1 , wherein said first conductivity type is a p-type, and said second conductivity type is an n-type.

5. An input protection circuit as claimed in claim 4 , wherein said first power source line supplies a power supply voltage and said second power source line supplies a ground potential.

6. An input protection circuit as claimed in claim 1 , wherein said first power source line supplies a power supply voltage and said second power source line supplies a ground potential.

7. An input protection circuit comprising:

an input terminal which receives an input signal;

a first transistor of a first conductive type which has a source, a drain and a gate, wherein said drain is coupled to the input terminal; and

a second transistor of said first conductive type which has a source, a drain and a gate, wherein said gate is coupled to the input terminal, and said drain is coupled to an internal circuit;

wherein the source of the first transistor of said first conductive type and the source of the second transistor of said first conductive type are formed in a common impurity active region, for quickly setting the gate of the second transistor and the source of the second transistor to the same electric potential after a surge voltage is applied to the input terminal.

8. An input protection circuit as claimed in claim 7 , further comprising a protective resistor connected between the gate of the second transistor and the drain of the first transistor.

9. An input protection circuit as claimed in claim 8 , wherein said protective resistor includes a polycide pattern.

10. An input protection circuit as claimed in claim 8 , wherein said protective resistor includes a diffusion resistor.

11. An input protection circuit as claimed in claim 7 , wherein said first conductive type is a p-type.

12. An input protection circuit comprising:

an input terminal which receives an input signal;

a first transistor of a first conductive type which has a source, a drain and a gate, said source and said gate being electrically connected to each other, wherein said drain is coupled to the input terminal; and

a second transistor of said first conductive type which has a source, a drain and a gate, wherein said gate is coupled to the input terminal, and said drain is coupled to an internal circuit, and wherein the source of the first transistor of said first conductive type and the source of the second transistor of said first conductive type are formed in a common impurity active region.

13. An input protection circuit as claimed in claim 12 , further comprising a protective resistor connected between the gate of the second transistor and the drain of the first transistor.

14. An input protection circuit as claimed in claim 13 , wherein said protective resistor includes a polycide pattern.

15. An input protection circuit as claimed in claim 13 , wherein said protective resistor includes a diffusion resistor.

16. An input protection circuit as claimed in claim 12 , wherein said first conductive type is a p-type.

17. An input protection circuit comprising:

an input terminal which receives an input signal;

a first transistor of a first conductive type which has a source, a drain and a gate, wherein said drain is coupled to the input terminal; and

a second transistor of said first conductive type which has a source, a drain and a gate, wherein said gate is coupled to the input terminal, and said drain is coupled to an internal circuit, and wherein the source of the first transistor of said first conductive type and the source of the second transistor of said first conductive type are formed in a common impurity active region.

18. An input protection circuit as claimed in claim 17 , further comprising a protective resistor connected between the gate of the second transistor and the drain of the first transistor.

19. An input protection circuit as claimed in claim 18 , wherein said protective resistor includes a polycide pattern.

20. An input protection circuit as claimed in claim 18 , wherein said protective resistor includes a diffusion resistor.

21. An input protection circuit as claimed in claim 17 , wherein said first conductive type is a p-type.

Assignments (1)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →