Low resistivity copper conductor line, liquid crystal display device having the same and method for forming the same

1. A method for forming a low resistively copper conductor line, comprising:

forming a silver material layer directly on silicon material;

etching the silver material layer; and

forming a copper material layer on the etched silver material layer using an electroplating process.

2. A method for forming a low resistively copper conductive line for a liquid crystal display (LCD) device, comprising:

forming a silicon layer on a substrate;

forming a silver layer on the silicon layer using a deposition process;

patterning the silver layer into a first shape; and

forming a copper layer on the silver layer by an electroplating process using the silver layer as a seed layer.

3. The method according to claim 2 , wherein a thickness of the silver layer is about 50 nm.

4. The method according to claim 2 , wherein a specific resistance of the copper conductive line is between about 2.93 μΩ·cm and about 3.27 μΩ·cm.

5. A method for forming a low resistively copper conductive line for a semiconductor element, comprising:

forming a silver thin film directly on a silicon layer by depositing silver directly on the silicon layer;

patterning the silver thin film into a first shape; and

forming a copper thin film on the silver thin film by an electroplating process using the silver thin film as a seed layer.

6. The method according to claim 5 , wherein a thickness of the silver thin film is about 50 nm.

7. The method according to claim 5 , wherein a specific resistance of the copper conductive line is between about 2.93 μΩ·cm and about 3.27 μΩ·cm.

8. A method for fabricating an array substrate of a liquid crystal display device, comprising:

forming a first silver thin film by depositing and patterning silver on a substrate;

forming a copper thin film on the first silver thin film by an electroplating process using the first silver thin film as a seed layer to form a gate line and gate electrode;

forming a gate insulating layer on an entire surface of the substrate;

forming an active layer and an ohmic contact layer sequentially on the gate insulating layer;

forming a second silver thin film by depositing and patterning silver on the substrate;

forming a copper thin film on the second silver thin film by an electroplating process using the second silver thin film as a seed layer to form a data line, and source and drain electrodes;

forming a passivation layer on an entire surface of the substrate;

patterning the passivation layer to expose a portion of the drain electrode; and

forming a pixel electrode on the passivation layer to electrically contact the drain electrode.

9. The method according to claim 8 , wherein a thickness of both the first and second silver thin films is about 50 nm.

10. The method according to claim 8 , wherein specific resistances of both the gate line and the data line are between about 2.93 μΩ·cm and about 3.27 μΩ·cm.

11. The method according to claim 8 , further comprising a step of forming a metal pattern over the gate line that electrically contacts the pixel electrode.