IP Library Granted Patent US 7,012,792
Granted Patent B2
US 7,012,792 · App. 10/326,527 · Granted Mar 14, 2006

Semiconductor integrated circuit

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Quick Facts
Patent No.
US 7,012,792
App. No.
10/326,527
Granted
Mar 14, 2006
Kind
B2
Abstract

A semiconductor integrated circuit of the present invention has an output field-effect transistor formed on a main surface of a semiconductor substrate; an overcurrent detection circuit detecting an overcurrent of the output field-effect transistor; and an overcurrent limiting circuit which is connected between the gate electrode terminal and the source electrode terminal of the output field-effect transistor, controls the detected current of the overcurrent detection circuit and varies its output voltage according to variation in threshold voltage of the output field-effect transistor.

Claims (15)

1. A semiconductor integrated circuit, comprising:

an output field-effect transistor formed on a main surface of a semiconductor substrate;

an overcurrent detection circuit detecting an overcurrent of said output field-effect transistor and including a second field-effect transistor; and

an overcurrent limiting circuit connected between a gate electrode terminal and a source electrode terminal of said output field-effect transistor, wherein said overcurrent limiting circuit is controlled by the detected current of said overcurrent detection circuit, wherein an output voltage of said overcurrent limiting circuit is varied according to variation in a threshold voltage of said output field-effect transistor, and wherein said overcurrent limiting circuit includes a third field-effect transistor connected to said second-field effect transistor of the overcurrent detection circuit, a source region of said third field-effect transistor being surrounded by a diffusion layer with substantially the same characteristics as that of a base diffusion layer deciding the threshold voltage of said output field-effect transistor.

2. The semiconductor integrated circuit according to claim 1 , wherein said overcurrent detection circuit has third and fourth resistors connected in series detecting an overcurrent of said output field-effect transistor and said second field-effect transistor having a gate electrode connected to the junction of said third and fourth resistors.

3. The semiconductor integrated circuit according to claim 2 , wherein said overcurrent limiting circuit has first and second resistors connected in series to be connected between the gate electrode terminal and the source electrode terminal of said output field-effect transistor, and wherein said third field-effect transistor has a gate electrode connected to the junction of said first and second resistors so as to be cascade connected to said second field-effect transistor between the gate electrode terminal and the source electrode terminal of said output field-effect transistor.

4. The semiconductor integrated circuit according to claim 3 , wherein said output field-effect transistor, said second field-effect transistor and said third field-effect transistor are formed by a field-effect transistor of the same conductive type.

5. A method for controlling a semiconductor integrated circuit, comprising:

fanning an output field-effect transistor on a semiconductor substrate;

detecting an overcurrent of said output field-effect transistor;

connecting an overcurrent limiting circuit to a gate electrode terminal and a source electrode terminal of said output field-effect transistor; and

varying an output voltage of said overcurrent limiting circuit according to a variation in a threshold voltage of said output field-effect transistor, wherein said overcurrent limiting circuit includes an additional field-effect transistor having a source region adjacent to a diffusion layer with substantially the same characteristics as that of a base diffusion layer deciding the threshold voltage of said output field-effect transistor.

6. The method according to claim 5 , wherein detecting of the overcurrent of the output field-effect transistor is performed by an overcurrent detection circuit having two resistors connected in series and a detection field-effect transistor having a gate electrode connected to the junction of said resistors.

7. The method according to claim 5 , wherein said overcurrent limiting circuit includes two resistors connected in series and connected between the gate electrode terminal and the source electrode terminal of said output field-effect transistor, and wherein said additional field-effect transistor has a gate electrode connected to the junction of said two resistors so as to be cascade connected to the detection field-effect transistor between the gate electrode terminal and the source electrode terminal of said output field-effect transistor.

8. The semiconductor integrated circuit according to claim 3 , wherein said output field-effect transistor, said detection field-effect transistor and said additional field-effect transistor are of the same conductive type.

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →