Active matrix organic electroluminescent display device and method of fabricating the same
View Patent ↗An active matrix organic electroluminescent display device includes a substrate, a gate line disposed on the substrate, a data line disposed on the substrate crossing the gate line to form a pixel region, a first switching thin film transistor disposed on the substrate and electrically connected to the gate line and the data line, a first driving thin film transistor disposed on the substrate and electrically connected to the first switching thin film transistor, a capacitor electrode formed on the substrate and electrically connected to the first switching thin film transistor, the capacitor electrode having first and second parts disposed in parallel to the data line, and a third part connecting a first end of the first part to a first end of the second part, a power line electrically connected to the first driving thin film transistor, the power line having first, second, and third portions overlapping the capacitor electrode to form a storage capacitor, a pixel electrode disposed within the pixel region and electrically connected to the first driving thin film transistor, an organic emissive layer disposed on the pixel electrode, and a partition wall disposed between adjacent organic layers to overlap the data line and the first and second parts of the capacitor electrode.
1. An active matrix organic electroluminescent display device, comprising:
a substrate;
a gate line disposed on the substrate;
a data line disposed on the substrate crossing the gate line to form a pixel region;
a first switching thin film transistor disposed on the substrate and electrically connected to the gate line and the data line;
a first driving thin film transistor disposed on the substrate and electrically connected to the first switching thin film transistor;
a capacitor electrode formed on the substrate and electrically connected to the first switching thin film transistor, the capacitor electrode having first and second parts disposed in parallel to the data line and spaced apart from each other, and a third part connecting a first end of the first part to a first end of the second part;
a power line electrically connected to the first driving thin film transistor, the power line having first, second, and third portions overlapping the capacitor electrode to form a storage capacitor;
a pixel electrode disposed within the pixel region and electrically connected to the first driving thin film transistor;
an organic emissive layer disposed on the pixel electrode; and
a partition wall disposed between adjacent organic layers to overlap the data line and the first and second parts of the capacitor electrode.
2. The device according to claim 1 , wherein the pixel electrode overlaps the second and third parts of the capacitor electrode.
3. The device according to claim 1 , wherein the capacitor electrode further includes a fourth part connecting a second end of the first part to a second end of the second part.
4. The device according to claim 3 , wherein the fourth part of the capacitor electrode overlaps the pixel electrode.
5. The device according to claim 3 , wherein the power line further includes a fourth portion overlapping the fourth part of the capacitor electrode.
6. The device according to claim 1 , wherein the capacitor electrode includes impurity-doped polycrystalline silicon.
7. The device according to claim 1 , further comprising a second switching thin film transistor electrically connected to the gate line and the first switching thin film transistor.
8. The device according to claim 7 , further comprising a second driving thin film transistor electrically connected to the first switching thin film transistor and the first driving thin film transistor.
9. The device according to claim 8 , wherein the capacitor electrode includes impurity-doped polycrystalline silicon.
10. The device according to claim 7 , wherein the pixel electrode overlaps the second and third parts of the capacitor electrode.
11. The device according to claim 7 , wherein the capacitor electrode further includes a fourth part connecting a second end of the first part to a second end of the second part.
12. The device according to claim 11 , wherein the fourth part of the capacitor electrode overlaps the pixel electrode.
13. The device according to claim 11 , wherein the power line further includes a fourth portion overlapping the fourth part of the capacitor electrode.
14. A method of fabricating an active matrix organic electroluminescent display device, comprising steps of:
forming a gate line on a substrate;
forming a data line on the substrate crossing the gate line to form a pixel region;
forming a first switching thin film transistor on the substrate and electrically connected to the gate line and the data line;
forming a first driving thin film transistor on the substrate and electrically connected to the first switching thin film transistor;
forming a capacitor electrode electrically connected to the first switching thin film transistor, the capacitor electrode having first and second parts disposed in parallel to the data line and spaced apart from each other, and a third part connecting a first end of the first part to a first end of the second part;
forming a power line electrically connected to the first driving thin film transistor, the power line having first, second, and third portions overlapping the capacitor electrode to form a storage capacitor;
forming a pixel electrode disposed within the pixel region and electrically connected to the first driving thin film transistor;
forming an organic emissive layer disposed on the pixel electrode; and
forming a partition wall disposed between adjacent organic layers to overlap the data line and the first and second parts of the capacitor electrode.
15. The method according to claim 14 , wherein the pixel electrode overlaps the second and third parts of the capacitor electrode.
16. The method according to claim 14 , wherein the capacitor electrode further includes a fourth part connecting a second end of the first part to a second end of the second part.
17. The method according to claim 16 , wherein the fourth part of the capacitor electrode overlaps the pixel electrode.
18. The method according to claim 16 , wherein the power line further includes a fourth portion overlapping the fourth part of the capacitor electrode.
19. The method according to claim 14 , wherein the capacitor electrode includes impurity-doped polycrystalline silicon.
20. The method according to claim 14 , further comprising a step of forming a second switching thin film transistor electrically connected to the gate line, and the first switching thin film transistor.
21. The method according to claim 20 , further comprising a step of forming a second driving thin film transistor electrically connected to the first switching thin film transistor and the first driving thin film transistor.
22. The method according to claim 14 , wherein the pixel electrode overlaps the second and third parts of the capacitor electrode.
23. The method according to claim 14 , wherein the capacitor electrode further includes a fourth part connecting a second end of the first part to a second end of the second part.
24. The method according to claim 23 , wherein the fourth part of the capacitor electrode overlaps the pixel electrode.
25. The method according to claim 23 , wherein the power line further includes a fourth portion overlapping the fourth part of the capacitor electrode.
26. The method according to claim 14 , wherein the capacitor electrode includes impurity-doped polycrystalline silicon.