IP Library Granted Patent US 7,109,543
Granted Patent B2
US 7,109,543 · App. 10/329,096 · Granted Sep 19, 2006

Semiconductor device having trench capacitor and method for fabricating the same

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Quick Facts
Patent No.
US 7,109,543
App. No.
10/329,096
Granted
Sep 19, 2006
Kind
B2
Abstract

A semiconductor device and a method for fabricating the same. The device comprises a silicon substrate having a conductive well; a trench formed in the conductive well; a plate electrode formed on the sidewall of the trench; a capacitor insulating film and a storage node electrode; a first storage node connector formed on the storage node electrode; an insulating film formed on the first storage node connector; a silicon layer formed on the entire structure; word lines formed on the silicon layer; source and drain regions formed in the silicon layer; a contact hole, formed in the silicon layer and the insulating film, such that the first storage node connector and the source region are exposed; and a second storage node connector, formed in the contact hole, such that the source region and the first storage node connector are connected to each other.

Claims (9)

1. A semiconductor device having a trench capacitor, the device comprising:

a structure which includes a silicon substrate having a conductive well formed with a predetermined depth therein, a trench formed in the conductive well, a plate electrode formed in the sidewall of the trench, a capacitor insulating film deposited on the plate electrode, a storage node electrode having a U-shape on the capacitor insulating film, a first storage node connector formed on the end portions of the storage node electrode, and a first insulating film formed on the first storage node connector;

a silicon layer formed on the surface of the substrate, including a hole exposing a portion of the first storage node connector via the first insulating film;

word lines formed on the silicon layer;

source and drain regions formed in the silicon layer at portions below both sides of the respective word lines; and

a second storage node connector formed in the hole, connecting the source region to the first storage node connector.

2. The semiconductor device of claim 1 , in which the silicon layer is phosphorous-doped epitaxial silicon layer.

3. The semiconductor device of claim 1 , in which a second insulating film is interposed between a portion of the second storage node connector and a portion of the silicon layer.

4. The semiconductor device of claim 1 , in which a third insulating film is disposed between a portion of the storage node electrode and a portion of the first storage node connector in the trench.