IP Library Granted Patent US 7,039,181
Granted Patent B2
US 7,039,181 · App. 10/331,852 · Granted May 2, 2006

Consolidated voice activity detection and noise estimation

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Quick Facts
Patent No.
US 7,039,181
App. No.
10/331,852
Granted
May 2, 2006
Kind
B2
Abstract

Methods and apparatus compensating for background noise associated with a transmitted signal. In a first embodiment, an adder combines an echo estimate with the the transmitted signal to form a processed signal, a noise reduction circuit uses a background noise estimate to subtract the background noise from the processed signal, and a non-linear processor uses the background noise estimate to combine a compensating background noise signal with the proccssed signal. In another embodiment, the noise reduction circuit divides the processed signal into sub-bands. With variations of an embodiment, the nonlinear processor is a sub-band non-linear processor, the processed signal is divided into sub-bands, and the background estimate includes sub-band noise estimates.

Claims (31)

1. An apparatus that compensates for background noise associated with a transmitted signal, the apparatus comprising:

an adder that combines an echo estimate with the transmitted signal to generate a processed signal;

a noise reduction circuit that uses a background noise estimate to subtract the background noise from the processed signal; and

a non-linear processor that uses the background noise estimate to combine a compensating background noise signal with the processed signal, wherein the noise reduction circuit precedes the non-linear processor in the apparatus, and wherein the background noise estimate approximates acoustically derived background noise.

2. The apparatus of claim 1 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands, and wherein the non-linear processor is: sub-band non-linear processor.

3. The apparatus of claim 2 , wherein operation of the non-linear processor is merged into sub-band operation of the noise reduction circuit.

4. The apparatus of claim 1 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands, and wherein the non-linear processor operates in a sub-band domain.

5. The apparatus of claim 1 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands and wherein the background noise esimate comprises a plurality of sub-band noise estimates.

6. The apparatus of claim 1 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands and wherein the background noise estimate comprises a plurality of sub-band noise estimates and a broadband estimate.

7. The apparatus of claim 1 , wherein the noise reduction circuit and the non-linear processor are integrated.

8. A method for compensating for background noise associated with a transmitted signal, the method comprising:

combining an echo estimate with the transmitted signal to generate a processed signal;

generating a background noise estimate;

subtracting the background noise from the processed signal, using the background noise estimate; and

injecting a comfort noise signal into the processed signal, using the background noise estimate, wherein the background noise estimate approximates acoustically derived background noise.

9. The method of claim 8 , wherein generating the background noise estimate comprises dividing the processed signal into a plurality of sub-bands, determining a plurality of sub-band noise estimates, and combining the plurality of sub-band noise estimates.

10. The method of claim 9 , wherein generating the background noise estimate further comprises combining the plurality of sub-band noise estimates with a broadband estimate.

11. A computer-readable medium having computer-executable instructions for performing the method recited in claim 10 .

12. A computer-readable medium having computer-executable instructions for performing the method recited in claim 9 .

13. The method of claim 8 , wherein subtracting the background noise from the processed signal comprises:

combining a compensating background noise signal with the processed signal, wherein the compensating background noise signal is determined from the background noise estimate.

14. A computer-readable medium having computer-executable instructions for performing the method recited in claim 13 .

15. A computer-readable medium having computer-executable instructions for performing the method recited in claim 8 .

16. An apparatus that compensates for background noise associated with a transmitted signal, the apparatus comprising:

an adder that combines an echo estimate with the transmitted signal to generate a processed signal;

a noise reduction circuit that uses a background noise estimate to spectrally subtract the background noise from the processed signal; and

a non-linear processor that uses the background noise estimate to inject a comfort noise signal into the processed signal, wherein the noise reduction circuit precedes the non-linear processor in the apparatus, and wherein the background noise estimate approximates acoustically derived background noise.

17. The apparatus of claim 16 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands, and wherein the non-linear processor is sub-band non-linear processor.

18. The apparatus of claim 16 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands, and wherein the non-linear processor operates in a sub-band domain.

19. The apparatus of claim 16 , wherein the noise reduction circuit divides the processed signal into a plurality of sub-bands and wherein the background noise estimate comprises a plurality of sub-band noise estimates.

20. The apparatus of claim 16 , wherein operation or the non-linear processor is integrated into sub-band operation of the noise reduction circuit.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION NUMBER 10/075,623 PREVIOUSLY RECORDED AT REEL: 034484 FRAME: 0740. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT FOR SECURITY --- PATENTS. Recorded Jun 14, 2017
From: CORIANT OPERATIONS, INC.; TELLABS RESTON, LLC (FORMERLY KNOWN AS TELLABS RESTON, INC.); WICHORUS, LLC (FORMERLY KNOWN AS WICHORUS, INC.)
To: TELECOM HOLDING PARENT LLC
Reel/Frame 042980/0834 →
ASSIGNMENT FOR SECURITY - - PATENTS Recorded Nov 26, 2014
From: CORIANT OPERATIONS, INC.; TELLABS RESTON, LLC (FORMERLY KNOWN AS TELLABS RESTON, INC.); WICHORUS, LLC (FORMERLY KNOWN AS WICHORUS, INC.)
To: TELECOM HOLDING PARENT LLC
Reel/Frame 034484/0740 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: MARCHOK, DANIEL J.; YOUNCE, RICHARD C.; GRITTON, CHARLES W.K.
To: TELLABS OPERATIONS, INC.
Reel/Frame 034140/0878 →
SECURITY AGREEMENT Recorded Dec 6, 2013
From: TELLABS OPERATIONS, INC.; TELLABS RESTON, LLC (FORMERLY KNOWN AS TELLABS RESTON, INC.); WICHORUS, LLC (FORMERLY KNOWN AS WICHORUS, INC.)
To: CERBERUS BUSINESS FINANCE, LLC, AS COLLATERAL AGENT
Reel/Frame 031768/0155 →