IP Library Granted Patent US 6,888,316
Granted Patent B2
US 6,888,316 · App. 10/335,864 · Granted May 3, 2005

Method for driving plasma display panel

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Quick Facts
Patent No.
US 6,888,316
App. No.
10/335,864
Granted
May 3, 2005
Kind
B2
Abstract

A method for driving a plasma display panel is provided that can improve luminance and light emission efficiency of display discharge. After addressing for forming wall charge in cells to be lighted, in order to generate display discharge and following reproduction of wall charge in the cell, potential of at least one display electrode is altered so as to differ between start time point and end time point of display discharge, and potential of at least one electrode except the display electrode is altered so as to differ between the start time point and the end time point of the display discharge.

Claims (30)

1. A method of driving a plasma display panel having cells in each of which are arranged N electrodes, where N=three or more, including a pair of display electrodes covered with a dielectric layer, the method comprising:

performing addressing for producing wall charge in each cell to be lighted;

altering a potential of at least one display electrode in each cell to be lighted, so as to differ between a start time point and an end time point of display discharge, for generating a display discharge and following reproduction of the wall charge in each cell to be lighted; and

altering a potential of at least one other electrode, other than the display electrodes, so as to differ between the start time point and the end time point of the display discharge.

2. A method of driving a three-electrode surface discharge AC type plasma display panel having an electrode matrix made of an arrangement of display electrodes and an arrangement of address electrodes, the method comprising:

performing addressing for producing wall charge in cells to be lighted;

altering a potential of at least one display electrode in each of the cells to be lighted, so as to differ between a start time point and an end time point of display discharge, for generating display discharge and following reproduction of the wall charge in each of the cells to be lighted; and

altering a potential of the address electrode so as to differ between the start time point and the end time point of the display discharge.

3. The method according to claim 2 , wherein a drive voltage signal is applied in a bias period between the display electrodes by a potential control in which one of a pair of display electrodes is temporarily biased and the other display electrode of the pair is biased only in a part of the bias period.

4. The method according to claim 2 , wherein a voltage applied between the display electrodes at the start time point of the display discharge is set higher than a voltage applied between the display electrodes at the end time point of the display discharge.

5. The method according to claim 1 , wherein a drive voltage signal is applied in a bias period between the pair of display electrodes by a potential control in which one display electrode of the pair is temporarily biased and the other display electrode of the pair is biased only in a part of the bias period.

6. The method according to claim 1 , wherein a voltage applied between the display electrodes at the start time point of the display discharge is set higher than a voltage applied between the display electrodes at the end time point of the display discharge.

7. A method of driving a plasma display panel having cells in each of which are arranged N electrodes, in which N=three or more, including a pair of display electrodes covered with a dielectric layer, the method comprising:

performing addressing for producing wall charge in each cell to be lighted; and

altering a potential of the respective pair of display electrodes of each cell to be lighted so as to differ, between a start time point and an end time point of display discharge, for generating a display discharge and following reproduction of the wall charge in each of the cells to be lighted, respective directions of the potential alteration being common.

8. The method according to claim 7 , wherein a voltage applied between the display electrodes at the start time point of the display discharge is set higher than a voltage applied between the display electrodes at the end time point of the display discharge.

9. A method of driving a plasma display panel having cells in each of which are arranged N electrodes, in which N=three or more, including a pair of display electrodes covered with a dielectric layer, the method comprising:

performing addressing for producing wall charge in cells to be lighted;

altering a potential of the pair of display electrodes so as to differ, between a start time point and an end time point of display discharge, for generating display discharge and following reproduction of the wall charge in each of the cells to be lighted, respective directions of the display electrode potential alteration being common; and

altering a potential of at least one other electrode, other than a display electrode, so as to differ between the start time point and the end time point of the display discharge, a direction of the other electrode potential alteration being opposite to a direction of the display electrode potential alteration.

10. The method according to claim 9 , wherein a voltage applied between the display electrodes at the start time point of the display discharge is set higher than a voltage applied between the display electrodes at the end time point of the display discharge.

11. A method of driving a three-electrode surface discharge AC type plasma display panel having an electrode matrix comprising an arrangement of display electrodes and an arrangement of address electrodes, the method comprising:

performing addressing for producing wall charge in each cell to be lighted; and

altering a potential of a pair of display electrodes so as to differ, between a start time point and an end time point of display discharge for generating a display discharge and following reproduction of the wall charge in each of the cells to be lighted, respective directions of the display electrode potential alteration being common.

12. The method according to claim 11 , wherein a voltage applied between the display electrodes at the start time point of the display discharge is set higher than a voltage applied between the display electrodes at the end time point of the display discharge.

13. A method of driving a three-electrode surface discharge AC type plasma display panel having an electrode matrix made of an arrangement of display electrodes and an arrangement of address electrodes, the method comprising:

performing addressing for producing wall charge in cells to be lighted;

altering a potential of a pair of display electrodes so as to differ, between a start time point and en end time point of display discharge, for generating display discharge and following reproduction of the wall charge in each of the cells to be lighted, respective directions of the alteration being common; and

altering a potential of the address electrodes so as to differ, between the start time point and the end time point of the display discharge, a direction of the address electrode potential alteration being opposite to the direction of the display electrode potential alteration.

14. The method according claim 13 , wherein a voltage applied between the display electrodes at the start time point of the display discharge is set higher than applied voltage between the display electrodes at the end time point of the display discharge.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2008
From: HITACHI LTD.
To: HITACHI PLASMA PATENT LICENSING CO., LTD.
Reel/Frame 021785/0512 →
TRUST AGREEMENT REGARDING PATENT RIGHTS, ETC. DATED JULY 27, 2005 AND MEMORANDUM OF UNDERSTANDING REGARDING TRUST DATED MARCH 28, 2007 Recorded Apr 13, 2007
From: HITACHI LTD.
To: HITACHI PLASMA PATENT LICENSING CO., LTD.
Reel/Frame 019147/0847 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2005
From: FUJITSU LIMITED
To: HITACHI, LTD.
Reel/Frame 017105/0910 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2003
From: SEO, YOSHIHO; HASHIMOTO, YASUNOBU
To: FUJITSU LIMITED
Reel/Frame 013640/0452 →