IP Library Granted Patent US 7,061,553
Granted Patent B2
US 7,061,553 · App. 10/335,964 · Granted Jun 13, 2006

Substrate for display device and display device equipped therewith

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Quick Facts
Patent No.
US 7,061,553
App. No.
10/335,964
Granted
Jun 13, 2006
Kind
B2
Abstract

A display device used as a display unit of electronic equipment and a substrate for the display device, featuring a good display quality. The substrate for the display device comprises a plurality of gate bus lines formed in parallel on the substrate, a plurality of drain bus lines formed in parallel intersecting the plurality of gate bus lines via an insulating film, a plurality of storage capacitor bus lines formed nearly in parallel with the gate bus lines, a plurality of common storage capacitor wirings electrically connected to the plurality of storage capacitor bus lines and formed of the same material as that of the plurality of storage capacitor bus lines, and connection wirings for electrically connecting the plurality of common storage capacitor wirings together.

Claims (11)

1. A display device comprising:

a pair of substrates; and

a liquid crystal sealed between the pair of substrates,

wherein one of the substrates comprises:

a plurality of gate bus lines formed in parallel on the base substrate;

a plurality of drain bus lines formed in parallel intersecting the plurality of gate bus lines via an insulating film;

a plurality of storage capacitor bus lines formed in parallel with the gate bus lines;

a first common storage capacitor wiring electrically connected to each end of the plurality of storage capacitor bus lines and formed of the same material as that of the plurality of storage capacitor bus lines;

a second common storage capacitor wiring formed in parallel with the first common storage capacitor wiring; and

a connection wiring for electrically connecting the first and the second common storage capacitor wirings,

wherein the first and second common storage capacitor wirings are formed from a same layer that forms the gate bus lines.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2005
From: FUJITSU LIMITED
To: SHARP KABUSHIKI KAISHA
Reel/Frame 016345/0210 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2005
From: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
To: FUJITSU LIMITED
Reel/Frame 016345/0310 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 20, 2003
From: TAGUCHI, YOSHIHISA; HOSHINO, ATUYUKI
To: FUJITSU DISPLAY TECHNOLOGIES CORPORATION
Reel/Frame 013875/0976 →