Programmable packet switching device
View Patent ↗A packet processing apparatus comprises a programmable hardware discriminator for receiving incoming packets, and selecting bits from any part of the incoming packets, a decision table for storing information relating to how the packets are to be processed, programmable hardware searching logic for accessing the information in the table according to the selected bits, and a packet handler for processing the packets according to the result of the access. Since many networking processing tasks can be broken down into bit selection and table searching, this generic type of arrangement will suit a wide variety of applications. It facilitates developing logic directly in hardware which can reduce the effort needed to convert a working prototype into a product ready for use in the field, e.g. for handling new protocol components.
1. Apparatus comprising:
a network device which processes a first packet before being reprogrammed and processes a second packet which is identical to the first packet after being reprogrammed, including:
a reprogrammable hardware discriminator which receives the first packet and selects a first set of bits from the received first packet;
a reprogrammable decision table which stores information relating to how packets are to be processed;
reprogrammable hardware searching logic which accesses first information in the table associated with the received packet according to the selected first set of bits;
reprogrammable interpreting logic which determines how to process the packet based on information in the table corresponding to the selected first set of bits; and
a packet handler which processes the first packet as determined by the interpreting logic;
the network device being reprogrammed in response to signaling from another device such that the hardware discriminator selects a second set of bits from the second packet which is identical to the first packet, where the first set of bits is different than the second set of bits.
2. The apparatus of claim 1 , the interpreting logic being arranged to react to both a match and a mismatch result between the selected bits and the information in the table.
3. The apparatus of claim 1 , the programmable hardware searching logic being arranged to be reprogrammable while in operation without interrupting the accessing of the information in the table.
4. The apparatus of claim 1 further comprising a table maintenance means coupled to the decision table to modify the decision table according to parameters derived from the incoming packets.
5. The apparatus of claim 4 , the table maintenance means comprising programmable hardware logic for deriving the parameters from the incoming packet.
6. The apparatus of claim 5 , the discriminator further comprising a comparator for receiving the incoming packets, and comparing at least a portion of each packet with predetermined data, to identify particular types of packet from the incoming packets, the table maintenance means being coupled to the comparator and being arranged to modify the decision table on the basis of an output of the comparator.
7. The apparatus of claim 4 , further comprising at least one packet output port, and the packet handler comprising programmable hardware interpreting logic coupled to the packet output port, for interpreting the result of the access, to control the packet output port, the table maintenance means being coupled to the interpreting logic, and being arranged to modify the decision table on the basis of an output of the interpreting logic.
8. The apparatus of claim 4 , further comprising a host processor, the table maintenance means being coupled to the host processor and being arranged to modify the decision table on the basis of an output of the host processor.
9. The apparatus of claim 1 the discriminator further comprising a comparator for receiving the incoming packets, and comparing at least a portion of each packet with predetermined data, to identify particular types of packet from the incoming packets, and process the packet according to its type.
10. The apparatus of claim 1 , the programmable hardware searching logic being arranged to access concurrently the information in the table relating to a plurality of the incoming packets.
11. The apparatus of claim 1 , the packet handler further comprising a packet switching fabric.
12. A programmable packet filter comprising the packet processing apparatus of claim 1 .
13. A programmable node in an active network comprising the packet processing apparatus of claim 1 .
14. An apparatus comprising:
a network device which processes a first packet before being reprogrammed and processes a second packet which is identical to the first packet after being reprogrammed, including
a reprogrammable hardware discriminator which receives the first packet and selects bits from the first packet, a reprogrammable hardware table processor coupled to the discriminator and comprising a decision table containing information relating to how packets are to be processed, the processor further comprising reprogrammable hardware searching logic for accessing the information in the table according to the selected bits;
reprogrammable interpreting logic for determining how to process the packets based on information in the table corresponding to the selected bits;
a packet handler which processes the first packet by modifying the decision table according to parameters derived from the first packet;
the network device being reprogrammed in response to signaling from another device such that the interpreting logic and packet handler process the second packet differently than the first packet.
15. A method of operating a network device comprising:
processing a first packet before being reprogrammed by:
with a reprogrammable hardware discriminator, receiving the first packet and selecting a first set of bits from the first packet;
with a decision table containing information relating to how the packets are to be processed and reprogrammable hardware searching logic coupled to the decision table and to the discriminator, accessing the information in the table according to the selected first set of bits; and
processing a second packet which is identical to the first packet after being reprogrammed by:
with the reprogrammable hardware discriminator, receiving the second packet and selecting a second set of bits from the second packet, where the first set of bits is different than the second set of bits;
with the decision table containing information relating to how the packets are to be processed and the reprogrammable hardware searching logic coupled to the decision table and to the discriminator, accessing the information in the table according to the selected second set of bits.
16. A method of operating a network device comprising:
processing a first packet before being reprogrammed by:
using the reprogrammable hardware discriminator to receive the first packet and select bits from the first packet;
using the reprogrammable hardware searching logic to access information in the decision table according to the selected bits; and
using the reprogrammable packet handler for processing the first packet according to the information; and
processing a second packet which is identical to the first packet after being reprogrammed by:
using the interpreting logic and packet handler to process the second packet differently than the first packet.