ESD protection cluster and method of providing multi-port ESD protection
View Patent ↗In multiple port chip circuit, an ESD protection circuit and method of protecting the ports of the multiple port circuit, includes providing a plurality of bi-directional snapback devices such as DIACs and connecting only one electrode to ground while connecting the other electrodes to the ports that are to be protected.
1. A multiple port semiconductor ESD protection circuit, comprising
a multiple port semiconductor circuit having at least three ESD protection ports that provide discharge paths between any of the ESD protection ports,
multiple alternating n-wells and p-wells formed in a substrate of the semiconductor ESD protection circuit, and
an n+ region and a p+ region formed in each of the n-wells or each of the p-wells but not in both the n-wells and the p-wells, wherein, for each said n-well or each said p-well having an n+ region and a p+ region, the n+ region and p+ region are electrically connected to each other to define an ESD protection port.
2. A circuit of claim 1 , wherein one ESD protection port is connected to ground.
3. A circuit of claim 2 , wherein the distance between the grounded port and any of the other ESD protection ports does not exceed 100 μm.
4. A circuit of claim 2 , wherein the distance between the grounded port and any of the other ESD protection ports does not exceed 70 μm.
5. A circuit of claim 2 , wherein the distance between the grounded port and any of the other ESD protection ports does not exceed 50 μm.
6. A multiple port semiconductor ESD protection chip circuit, comprising
a multiple port circuit having at least three ESD protection ports,
a series of n-wells and p-wells wherein either each n-well or each p-well has an n+ region and a p+ region formed in it, wherein for each said n-well or each said p-well with an n+ region and a p+ region the n+ region and the p+ region are connected to each other to define one of said ESD protection ports, the at least three ESD protection ports defining discharge spaces between them, wherein at least part of at least one of the discharge spaces overlaps at least part of another discharge space.
7. A circuit of claim 6 , wherein one ESD protection port is connected to ground.
8. A circuit of claim 7 , wherein the distance between the grounded ESD protection port and any of the other ESD protection ports does not exceed 100 μm.
9. A circuit of claim 7 , wherein the distance between the grounded ESD protection port and any of the other ESD protection ports does not exceed 50 μm.