IP Library Granted Patent US 6,842,215
Granted Patent B2
US 6,842,215 · App. 10/347,798 · Granted Jan 11, 2005

Panel and flat-panel display device containing the same

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,842,215
App. No.
10/347,798
Granted
Jan 11, 2005
Kind
B2
Abstract

A panel for a flat panel display device is disclosed, which includes a substrate having signal wires and terminals respectively connected to the signal wires, each terminal having first, second and third conducting layer, an insulating layer, a protection layer, contact holes connected between the first conducting layer and the third conducting layer, and contact holes connected between the second conducting layer and the third conducting layer, the insulating layer being sandwiched in between the second conducting layer and the substrate, the first conducting layer being sandwiched in between the protection layer and the insulating layer, the protection layer being sandwiched in between the first conducting layer and the third conducting layer or the second conducting layer and the third conducting layer, the first conducting layer being isolated from the second conducting layer.

Claims (18)

1. A panel for a flat panel display device comprising:

a substrate;

a plurality of signal wires arranged on said surface of said substrate; and

a plurality of terminals arranged on said surface of said substrate and respectively connected to said signal wires;

wherein each terminals comprises a first conducting layers a second conducting layer, a third conducting layer, an insulating layer, a protection layer, and a plurality of contact holes, said insulating layer is sandwiched between said second conducting layer and said surface of sad substrate, said first conducing layer is sandwiched between said protection layer and said insulating layer, said protection layer is sandwiched between said first conducting layer and said third conducting layer or is sandwiched between said second conducting layer and said third conducting layer, said third conducting layer and said first conducting layer is connected through at least one contact hole, said third conducting layer and said second conducting layer is connected through at least one contact hole, and said first conducting layer doesn't connect said second conducting layer.

2. The panel for a flat panel display device as claimed in claim 1 , wherein each terminal further comprises a buffer region having at least one buffer conducting layer, and said first conducting layer connected to said first conducting layer through at least one contact hole.

3. The panel for a flat panel display device as claimed in claim 2 , wherein each terminal further comprises a guard disposed at one end of the buffer region of the respective terminal.

4. The panel for a flat panel display device as claimed in claim 1 , wherein said first conducting layer is made of chromium or alloys containing chromium.

5. The panel for a flat panel display device as claimed in claim 1 , wherein said second conducting layer is made, of material selected from chromium, alloys containing chromium, aluminum and alloys containing aluminum.

6. The panel for a flat panel display device as claimed in claim 1 , wherein said third conducting layer is made of indium tin oxide.

7. The panel for a flat panel display device as claimed in claim 1 , wherein said insulating layer is made of nitride.

8. The panel for a flat panel display device as claimed in claim 1 , wherein said protection layer is made of nitride.

9. The panel for a flat panel display device as claimed in claim 1 , wherein the projections of said first conducting layer on said surface of said substrate and those of said second conducting layer on said surface of said substrate are not overlapped.

10. The panel for a flat panel display device as claimed in claim 2 , wherein said buffer conducting layer is made of indium tin oxide.

11. The panel for a flat panel display device as claimed in claim 3 , further comprising a static eliminator wire adapted for connecting said guards of a number of said terminals.

12. The panel for a flat panel display device as claimed in claim 1 , which said flat panel display device is a liquid crystal display device.

13. A flat panel display device, comprising at least one panel as claimed in claim 1 .

14. The flat panel display device as claimed in claim 13 , wherein said flat panel display device is a liquid crystal display device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 31, 2016
From: HWZ INTANGIBLE ASSETS INVESTMENT MANAGEMENT LIMITED
To: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 040174/0599 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2016
From: CHUNGHWA PICTURE TUBES, LTD.
To: HWZ INTANGIBLE ASSETS INVESTMENT MANAGEMENT LIMITED
Reel/Frame 039332/0949 →