IP Library Granted Patent US 7,001,813
Granted Patent B2
US 7,001,813 · App. 10/349,007 · Granted Feb 21, 2006

Layers of group III-nitride semiconductor made by processes with multi-step epitaxial growths

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Quick Facts
Patent No.
US 7,001,813
App. No.
10/349,007
Granted
Feb 21, 2006
Kind
B2
Abstract

One method includes epitaxially growing a layer of group III-nitride semiconductor under growth conditions that cause a growth surface to be rough. The method also includes performing an epitaxial growth of a second layer of group III-nitride semiconductor on the first layer under growth conditions that cause the growth surface to become smooth. The two-step growth produces a lower density of threading defects.

Claims (21)

1. A method, comprising:

epitaxially growing a first layer of group III-nitride semiconductor under growth conditions that cause a growth surface to be rough; and

then, epitaxially growing a second layer of group III-nitride semiconductor on the first layer under growth conditions that cause the growth surface to become smooth; and

wherein the act of epitaxially growing a first layer includes growing the first layer with an epitaxy gas mixture in which a ratio of atoms of metal to atoms of nitrogen is less than one.

2. The method of claim 1 , wherein the group III-nitride semiconductors of the first and second layers are the same group III-nitride semiconductor.

3. The method of claim 1 , wherein the act of growing a second layer includes increasing a flow of one type of group III-metal in an epitaxy gas mixture by at least 20 percent with respect to the flow of the same type of group III-metal in the epitaxy gas mixture during the act of growing a first layer.

4. The method of claim 1 , wherein the act of growing a second layer includes causing a ratio of atoms of one type of group III-metal to atoms of nitrogen in the epitaxy gas mixture to have a value at least as great as one.

5. The method of claim 1 , wherein the first and second layers are capable of producing spot-like and line-like RHEED images, respectively.

6. The method of claim 1 , wherein the growing a first layer includes performing epitaxial growth of a group III-nitride semiconductor on a lattice-mismatched crystalline substrate.

7. The method of claim 1 , wherein the epitaxially growing a first layer includes growing the first layer on a substrate, the substrate having a temperature in the range of 650° C. to 800° C. during the epitaxially growing a first layer.

8. A method, comprising:

epitaxially growing a first layer of group III-nitride semiconductor with an epitaxy gas mixture that includes group III-metal atoms and nitrogen, the gas mixture having a value for the ratio of atoms of group III-metal to atoms of nitrogen that is less than one; and

then, epitaxially growing a second layer of group III-nitride semiconductor on the first layer under growth conditions that include an increased flow of group III-metal atoms in the epitaxy gas mixture by at least 20 percent.

9. The method of claim 8 , wherein the group III-nitride semiconductors of the first and second layers include one of indium and aluminum.

10. The method of claim 8 , wherein the group III-nitride semiconductors of the first and second layers include gallium.

11. The method of claim 10 , wherein the epitaxially growing a first layer includes growing the first layer on a substrate, the substrate having a temperature in the range of 650° C. to 800° C. during the epitaxially growing a first layer.

12. A method, comprising:

epitaxially growing a first layer of group III-nitride semiconductor with an epitaxy gas mixture that includes group III-metal atoms and nitrogen, the gas mixture having a value for the ratio of atoms of group III-metal to atoms of nitrogen that is less than one;

then, epitaxially growing a second layer of group III-nitride semiconductor on the first layer under growth conditions that include an increased flow of group III-metal atoms in the epitaxy gas mixture by at least 20 percent;

epitaxially growing another layer of a group III-nitride semiconductor adjacent the second layer to produce a vertical electronic device, wherein the another layer has a different conductivity type than the first layer; and

forming a contact layer configured to one of apply a bias voltage across the another layer and drive a current through the layers.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2014
From: CREDIT SUISSE AG
To: ALCATEL-LUCENT USA INC.
Reel/Frame 033950/0001 →
SECURITY INTEREST Recorded Mar 7, 2013
From: ALCATEL-LUCENT USA INC.
To: CREDIT SUISSE AG
Reel/Frame 030510/0627 →