Method and system for copying DMA with separate strides by a modulo-n counter

1. A method for de-interleaving a data stream stored in a buffer having a plurality of memory locations, each location having a memory width of (W) bytes, the data stream being formed of a number of data words each including (N) number of data bytes, wherein (N) is a non-integer multiple of the width (W), the method comprising:

storing the data words into respective memory locations;

appending each of the stored data words with number (X) of dummy bytes, a sum of (N)+(X) being an integer multiple of the width (W);

storing the appended dummy bytes into the respective memory locations.

2. The method of claim 1 , wherein the data words include codeword-size data blocks.

3. The method of claim 2 , wherein the interleaved data stream includes an interleave depth (D); and

wherein the method is implemented based upon operation of a direct memory access (DMA) engine.

4. The method of claim 3 , further comprising de-interleaving the data bytes stored in the respective memory locations based upon operation of the DMA engine and a number of parameters;

wherein the parameters include first and second memory strides, an offset increment value, and an offset modulo value.

5. A method for storing a data stream in a modem buffer having a plurality of memory locations, each location having a memory width of (W) bytes, the data stream being formed of a number of data words each including (N) number of data bytes, wherein (N) is a non-integer multiple of the width (W), the method comprising:

(a) copying (N) data bytes of a first data word into first [(n)(W)] bytes of a first location, where (n) is an integer that (i) equals one when W>N and (ii) is a smallest among all integers satisfying the expression [(n)(W)>N] when W<N; and

(b) appending the (N) copied bytes with (X) number of dummy bytes, a sum of (X)+(N) being an integer multiple of the width W.

6. The method of claim 5 , wherein the copied first number (N) of data bytes and the copied (X) dummy bytes correspond to the first data word.

7. The method of claim 5 , further comprising copying the (N) data bytes of the data words into the remaining memory locations in accordance with (a) through (b).

8. The method of claim 7 , wherein the interleaved data stream includes an interleave depth (D) and the method includes a memory access technique having at least first and second memory strides.

9. The method of claim 8 , further comprising de-interleaving the data bytes in the memory based upon operation of the DMA engine, the DMA engine ignoring the dummy bytes (X).

10. The method of claim 9 , wherein the de-interleaving is based upon operation of the DMA engine and at least the first and second strides.

11. The method of claim 10 , wherein the de-interleaving occurs based upon the operation of the DMA engine, values of the first and second strides, an offset increment value, and an offset modulo value.

12. The method of claim 11 , wherein a value of the first stride is equal to the interleave depth, and a value of the second stride is equal to the interleave depth plus (X).

13. The method of claim 12 , wherein the second stride is used instead of the first stride; and

wherein the second stride is used based a modulo of the offset increment value.

14. An apparatus for de-interleaving a data stream stored in a buffer having a plurality of memory locations, each location having a memory width of (W) bytes, the data stream being formed of a number of data words each including (N) number of data bytes, wherein (N) is a non-integer multiple of the width (W), the apparatus comprising:

means for storing the data words into respective memory locations;

means for appending each of the stored data words with number (X) of dummy bytes, a sum of (N)+(X) being an integer multiple of the width (W); and

means for storing the appended dummy bytes into the respective memory locations.

15. The apparatus of claim 14 , wherein the data words include codeword-size data blocks.

16. The apparatus of claim 15 , wherein the interleaved data stream includes an interleave depth (D); and

wherein the apparatus is implemented based upon operation of a direct memory access (DMA) engine.

17. The apparatus of claim 16 , further comprising means for de-interleaving the data bytes stored in the respective memory locations based upon operation of the DMA engine and a number of parameters;

wherein the parameters include first and second memory strides, an offset increment value, and an offset modulo value.